ML4812CP(2001) Ver la hoja de datos (PDF) - Fairchild Semiconductor

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Fabricante

ML4812CP
(Rev.:2001)

Power Factor Controller

Fairchild Semiconductor 

PRODUCT SPECIFICATION

ML4812

Overvoltage Protection (OVP) Components

The OVP loop should be set so that there is no interaction

with the voltage control loop. Typically it should be set to a

level where the power components are safe to operate. Ten to

fifteen volts above VOUT is generally a good setpoint. This

sets the maximum transient output voltage to about 395V. By

choosing the high voltage side resistor of the OVP circuit the

same way as above i.e. R4 = 356K then R5 can be calculated

as:

R5

=

----V-----R---E----F----×-----R----4----

VOVP – VREF

=

5--3--V-9---5--×--V---3---5–---6-5--k--V-Ω---

=

4.564kΩ

(20)

Choose 4.53kΩ, 1%. Note that R1, R2, R4 and R5 should be

tight tolerance resistors such as 1% or better.

Controller Shutdown

The ML4812 provides a shutdown pin which could be used

to shutdown the IC. Care should be taken when this pin is

used because power supply sequencing problems could arise

if another regulator with its own bootstrapping follows the

ML4812. In such a case a special circuit should be used to

allow for orderly start up. One way to accomplish this is by

using the reference voltage of the ML4812 to inhibit the

other controller IC or to shut down its bias supply current.

Off-line Start-up and Bias Supply Generation

The ML4812 can be started using a “bleed resistor” from the

high voltage bus. After the voltage on VCC exceeds 16V, the

IC starts up. The energy stored on the 330µF, C15, capacitor

supplies the IC with running power until the supplemental

winding on L1 can provide the power to sustain operation.

The values of the start-up resistor R10 and capacitor C15

may need to be optimized depending on the application. The

charging waveform for the secondary winding of L1 is an

inverted chopped sinusoid which reaches its peak when the

line voltage is at its minimum. In this example, C9 = 0.1µF,

C15 = 330µF, D8 = 1N4148, R10 = 39kΩ, 2W.

Enhancement Circuit

The power factor enhancement circuit shown in Figure 12 is

described in detail in Application Note 11. It improves the

power factor and lowers the input current harmonics. Note

that the circuit meets IEC 1000-3-2 specifications (with the

enhancement) on the harmonics by a large margin while cor-

recting the input power factor to better than 0.99 under most

steady state operating conditions.

Construction and Layout Tips

High frequency power circuits require special care during

breadboard construction and layout. Double sided printed

circuit boards with ground plane on one side are highly rec-

ommended. All critical switching leads (power FET, output

diode, IC output and ground leads, bypass capacitors) should

be kept as small as possible. This is to minimize both the

transmission and pick-up of switching noise.

There are two kinds of noise coupling; inductive and capaci-

tive. As the name implies inductive coupling is due to fast

changing (high di/dt) circulating switching currents. The

main source is the loop formed by Q1, D5, and C3–C4.

Therefore this loop should be as small as possible, and the

above capacitors should be good high frequency types.

The second form of noise coupling is due to fast changing

voltages (high dv/dt). The main source in this case is the

drain of the power FET. The radiated noise in this case can

be minimized by insulating the drain of the FET from the

heatsink and then tying the heatsink to the source of the FET

with a high frequency capacitor (CH in Figure 12).

The IC has two ground pins named PWR GND and Signal

GND. These two pins should be connected together with a

very short lead at the printed circuit board exit point. In

general grounding is very important and ground loops should

be avoided. Star grounding or ground plane techniques are

preferred.

Magnetics Tips

L1 — Main Inductor

As shown in Table 1, one of several toroidal cores can be

used for L1. The T184-40 core above is the most economi-

cal, but has lower inductance at high current. This would

yield higher ripple current and require more line EMI filter-

ing. The value for RSC (slope compensation resistor on

RAMP COMP) was calculated for the T225-8/90 and should

be recalculated for other inductor characteristics. The vari-

ous core manufacturers have a range of applications litera-

ture available. A gapped ferrite core can also be used in place

of the powdered iron core. One such core is a Philips Com-

ponents (Ferroxcube) core #4229PL00-3C8. This is an

ungapped core. Using 145 turns of #24 AWG wire, a total air

gap of 0.180" is required to give a total inductance of about

2mH. Since 1/2 of the gap will be on the outside of the core

and 1/2 the gap on the inside, putting a 0.09" spacer in the

center will yield a 0.180" total gap. To prevent leakage fields

Table 1. Toroidal Cores (L1)

Material

Powdered Iron

Powdered Iron

Molypermalloy

Manufacturer

Micrometals

Micrometals

SPANG (Mag. Inc.)

Part #

T225-8/90

T184-40

58076-A2 (high flux)

Turns (#24AWG)

200

120

180

REV. 1.0.4 5/31/01

11

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