ADS-112MM Ver la hoja de datos (PDF) - DATEL Data Acquisition products
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ADS-112MM Datasheet PDF : 6 Pages
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ADS-112
TECHNICAL NOTES
1. Applications which are unaffected by endpoint errors or
remove them through software will use the typical connec-
tions shown in Figure 3. Remove system errors or adjust
the small initial errors of the ADS-112 to zero using the
optional external circuitry shown in Figure 4. The external
adjustment circuit has no effect on the throughput rate.
2. For best performance, always connect the analog and
digital ground pins to a ground plane beneath the converter.
The analog and digital grounds are not connected to each
other internally.
3. Bypass the analog and digital supplies and the +10V
reference (pin 21) to ground with 4.7µF, 25V tantalum
electrolytic capacitors in parallel with 0.1µF ceramic
capacitors. Bypass the +10V reference (pin 21) to analog
ground (pin 23).
4. Obtain straight binary/offset binary output coding by tying
COMP BIN (pin 18) to +5V or leaving it open. The device
has an internal pull-up resistor on this pin. To obtain
complementary binary or complementary offset binary
output coding, tie pin 18 to ground. The pin 18 signal is
compatible with CMOS/TTL logic levels for those users
desiring dynamic control of this function.
5. To enable the three-state outputs, connect ENABLE (pin 17)
to a logic "0" (low). To disable, connect pin 17 to a logic "1"
(high).
6. Do not change the status of pin 18 when EOC is high.
7. Re-initiating the START CONVERT (pin 16) while EOC is a
logic "1" (high) will result in a new conversion sequence.
TIMING
Figure 2 shows the relationship between the various input
signals. The timing shown applies over the operating
temperature range and over the operating power supply
range. These times are guaranteed by design.
START
CONVERT
INTERNAL S/H
EOC
N
N+1
150ns, ±25ns
10ns min.
20ns max.
Hold
Acquisition Time
250ns
20ns max.
Conversion Time
600ns max.
60ns max.
OUTPUT
DATA
DATA N-1 VALID
800ns min.
INVALID
DATA
200ns max.
Note: Scale is approximately 50ns per division.
35ns max.
DATA N VALID
Figure 2. ADS-112 Timing Diagram
INVALID
DATA
3
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