LC72147V Ver la hoja de datos (PDF) - SANYO -> Panasonic
Número de pieza
componentes Descripción
Fabricante
LC72147V Datasheet PDF : 22 Pages
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LC72147V
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Symbol
Pin
Supply voltage
Maximum input voltage
VDD max
VIN1 max
VIN2 max
VIN3 max
VO1 max
VDD
CE, CL, DI, AIN
XIN, FMIN, HCTR, I/O-4, I/O-5, ADC0, ADC1
I/O-1 to I/O-3
DO
Maximum output voltage
VO2 max XOUT, IFBC, I/O-4, I/O-5, PD, XBUF
Maximum output current
VO3 max
IO1 max
IO2 max
IO3 max
IO4 max
IO5 max
I/O-1 to I/O-3, AOUT
IFBC
I/O-4, I/O-5, XBUF
DO
I/O-1 to I/O-3
AOUT
Allowable power dissipation
Pd max
Operating temperature
Topr
Storage temperature
Tstg
Conditions
Ta ≤ 85°C
Ratings
Unit
–0.3 to +7.0
V
–0.3 to +7.0
–0.3 to Vreg + 0.3
V
–0.3 to +15
–0.3 to +7.0
–0.3 to Vreg + 0.3
V
–0.3 to +15
0 to 1.0
0 to 3.0
0 to 6.0
mA
0 to 10
0 to 35
150
mW
–40 to +85
°C
–55 to +125
°C
Note: Power supply VDD - VSS, Vreg - VSS: Capacitors of at least 2000 pF must be inserted between these pins when this device is used.
Allowable Operating Ranges at Ta = –40 to 85°C, VSS = 0 V
Parameter
Symbol
Pin
Conditions
Ratings
Unit
min
typ
max
Supply voltage
Regulator output voltage
High-level input voltage
Low-level input voltage
VDD1
VDD2
Vreg
VIH1
VIH2
VIL
VDD
VDD
Vreg
CE, CL, DI,
I/O-1 to I/O-3
I/O-4, I/O-5
CE, CL, DI,
I/O-1 to I/O-5
Serial data retention voltage
4.5 ≤ VDD ≤ 6.5 V
4.5
6.5
V
2.5
2.7
3.0
3.3
V
2.2
6.5
V
2.2
Vreg
0
0.8
V
Output voltage
VO1 DO
0
VO2 I/O-1 to I/O-3
0
fIN1 XIN
Sine wave, capacitance coupled
1.0
Input frequency
fIN2 FMIN
Sine wave, capacitance coupled
10
fIN3 HCTR
Sine wave, capacitance coupled
0.4
Guaranteed crystal oscillator
X’tal1 XIN, XOUT
*1
4.0
frequency ranges
X’tal2 XIN, XOUT
*1
7.1
6.5
V
13
8.0
180 MHz
25
7.0
MHz
10.5
VIN1 XIN
200
900
VIN2-1 FMIN
10 ≤ f < 130 MHz *2
40
900
Input amplitude
VIN2-2 FMIN
130 ≤ f ≤ 180 MHz *2
70
900 mVrms
VIN3-1 HCTR
0.4 ≤ f ≤ 25 MHz *3
70
900
VIN3-2 HCTR
8 ≤ f ≤ 12 MHz *4
100
900
Input voltage range
VIN4 ADC0, ADC1
0
Vreg
V
Data setup time
tSU
DI, CL
*5
0.45
µs
Data hold time
tHD DI, CL
*5
0.45
µs
Clock low-level period
tCL
CL
*5
0.45
µs
Clock high-level period
tCH
CL
*5
0.45
µs
CE wait time
tEL
CE, CL
*5
0.45
µs
CE setup time
tES
CE, CL
*5
0.45
µs
CE hold time
tEH
CE, CL
*5
0.45
µs
Data latch change time
tLC
*5
0.45
µs
Data output time
tDC DO, CL
tDH DO, CE
Depends on the value of the pull-up
resistor used.
0.2
µs
Notes:1. Recommended crystal oscillator CI values
CI ≤ 120 Ω (Crystal: 4.5 MHz), CI ≤ 70 Ω (Crystal: 7.2, 10.25, or 10.35 MHz)
Note that the crystal oscillator circuit characteristics depend on the printed circuit board and the particular components used. We recommend
consulting the manufacturer of the crystal when designing this circuit.
2. Refer to the description of the structure of the programmable divider.
3. Serial data: CTC = 0
4. Serial data: CTC = 1
5. See the timing chart for serial data transfers.
No. 6675-3/22
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