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TC835CBU

PERSONAL COMPUTER DATA ACQUISITION A/D CONVERTER

TelCom Semiconductor Inc => Microchip 

PERSONAL COMPUTER

DATA ACQUISITION A/D CONVERTER

TC835

Power Supplies and Grounds

Power Supplies

The TC835 is designed to work from ±5V supplies. For

single +5V operation, a TC7660 can provide a – 5V supply.

Grounding

Systems should use separate digital and analog ground

systems to avoid loss of accuracy.

Displays and Driver Circuits

TelCom Semiconductor manufactures two display de-

coder/driver circuits to interface the TC835 to an LCD or LED

display. Each drive has 28 outputs for driving four 7-segment

digit displays.

Device

TC7211AIPL

Package

40-Pin Epoxy

Description

4-Digit LCD Driver/Decoder

Several sources exist for LCD and LED display:

Manufacturer

Address

Display

Type

Hewlett Packard

Components

Litronix, Inc.

AND

Epson America, Inc.

640 Page Mill Rd.

Palo Alto, CA 94304

19000 Homestead Rd.

Cupertino, CA 94010

720 Palomar Ave.

Sunnyvale, CA 94086

3415 Kanhi Kawa St.

Torrance, CA 90505

LED

LED

LCD and

LED

LCD

High-Speed Operation

The maximum conversion rate of most dual-slope A/D

converters is limited by the frequency response of the

comparator. The comparator in this circuit follows the inte-

grator ramp with a 3 µsec delay, and at a clock frequency of

200 kHz (5 µsec period), half of the first reference integrate

clock period is lost in delay. This means that the meter

reading will change from 0 to 1 with a 50 µV input, 1 to 2 with

150 µV, 2 to 3 at 250 µV, etc. This transition at midpoint is

considered desirable by most users; however, if the clock

frequency is increased appreciably above 200 kHz, the

instrument will flash "1" on noise peaks even when the input

is shorted.

For many dedicated applications where the input signal

is always of one polarity, the delay of the comparator need

not be a limitation. Since the nonlinearity and noise do not

increase substantially with frequency, clock rates of up to

~1 MHz may be used. For a fixed clock frequency, the extra

count or counts caused by comparator delay will be a

constant and can be subtracted out digitally.

The clock frequency may be extended above 200 kHz

without this error, however, by using a low-value resistor in

series with the integrating capacitor. The effect of the

resistor is to introduce a small pedestal voltage on to the

integrator output at the beginning of the reference integrate

phase. By careful selection of the ratio between this resistor

and the integrating resistor (a few tens of ohms in the

recommended circuit), the comparator delay can be com-

pensated and the maximum clock frequency extended by

approximately a factor of 3. At higher frequencies, ringing

and second-order breaks will cause significant nonlinearities

in the first few counts of the instrument.

The minimum clock frequency is established by leakage

on the auto-zero and reference capacitors. With most de-

vices, measurement cycles as long as 10 seconds give no

measurable leakage error.

The clock used should be free from significant phase or

frequency jitter. Several suitable low-cost oscillators are

shown in the applications section. The multiplexed output

means that if the display takes significant current from the

logic supply, the clock should have good PSRR.

Zero-Crossing Flip-Flop

The flip-flop interrogates the data once every clock

pulse after the transients of the previous clock pulse and

half-clock pulse have died down. False zero-crossings caused

by clock pulses are not recognized. Of course, the flip-flop

delays the true zero-crossing by up to one count in every

instance, and if a correction were not made, the display

would always be one count too high. Therefore, the counter

is disabled for one clock pulse at the beginning of the

reference integrate (deintegrate) phase. This one-count

delay compensates for the delay of the zero-crossing flip-

flop, and allows the correct number to be latched into the

display. Similarly, a one-count delay at the beginning of

auto-zero gives an overload display of 0000 instead of 0001.

No delay occurs during signal integrate, so that true ratiometric

readings result.

3-74

TELCOM SEMICONDUCTOR, INC.

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