SA2030 Ver la hoja de datos (PDF) - South African Micro Electronic Systems

Número de pieza

componentes Descripción

Fabricante

SA2030

PCM FRAME ALIGNER

South African Micro Electronic Systems 

SA9101

System Internal Highway

Signal

Pin Input/Output/Bidirect Function

DRO

2

O

Data Receive Out

DXI

30

I

Data Transmit In

Timeslot channels 0 - 31 to/from PCM30 interface.

Bit rate 2048 kbit/s or 4096 kbit/s selectable via microprocessor interface.

CAS Processing

Signal

Pin

DRO

2

DXI

30

RCAS

35

TCAS

36

Input/Output/Bidirect

O

I

O

O

Function

Data Receive Out

Data Transmit In

Receive CAS, active high marks

reception of channel 16

Transmit CAS, active high marks

transmission of channel 16

Test/Supervision

Signal

Pin

CHPAR

4

I nput/Output/Bidirect

O

DFPAR

3

O

XTOP

40,

O

XTOM

1

O

RESQ

31

I

XCHPAR 33

I

Function

Receive Channel parity

Appears according to the related

channel (timeslot)

Doubleframe Parity

During a current double-frame, the

parity of the previous double-frame

appears on DFPAR

HDB3-coded PCM (+), PCM (-) signal

for HDB3 diagnostic loop

Reset (Output Disable)

Asynchronous reset signal (active low),

resets the internal circuit and switches

all outputs to high impedance state -

must be held low for minimum of 2µs

Transmit channel parity

8/40

sames

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