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T8110 Ver la hoja de datos (PDF) - Agere -> LSI Corporation

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T8110 Datasheet PDF : 222 Pages
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Data Sheet
May 2001
Ambassador T8110 PCI-Based H.100/H.110 Switch
and Packet Payload Engine
2 Pin Description (continued)
Table 3. H-Bus (H.100/H.110 Interface) Signals
Signal
I/O Width
Function
VPRECHARGE
In
1 Precharge voltage for pull-downs, H.110 bus signals:
CT_D, CT_NETREF1, CT_NETREF2.
H110_ENABLE
In
1 Pull-down enable for H.110 bus signals: CT_D, CT_NETREF1,
CT_NETREF2.
H100_ENABLE
In
1 Pull-up enable for H.100 bus signals: CT_D, CT_NETREF1,
CT_NETREF2, CT_C8_A, CT_C8_B, /CT_FRAME_A, /CT_FRAME_B.
CT_D
I/O 32 H.100/H.110 bus data.
CT_C8_A
I/O
1 H.100/H.110 bit clock A.
/CT_FRAME_A
I/O
1 H.100/H.110 frame reference A.
CT_C8_B
I/O
1 H.100/H.110 bit clock B.
/CT_FRAME_B
I/O
1 H.100/H.110 frame reference B.
CT_NETREF1
I/O
1 H.100/H.110 network reference 1.
CT_NETREF2
I/O
1 H.100/H.110 network reference 2.
/C16+
I/O
1 H-MVIP* compatibility clock (16.384 MHz, differential).
/C16–
I/O
1 H-MVIP compatibility clock (16.384 MHz, differential).
/C4
I/O
1 MVIP compatibility clock (4.096 MHz).
C2
I/O
1 MVIP compatibility clock (2.048 MHz).
SCLK
I/O
1 SC-bus compatibility clock.
/SCLKx2
I/O
1 SC-bus compatibility clock.
/FR_COMP
I/O
1 Compatibility frame reference.
* MVIP is a trademark of Natural MicroSystems Corporation.
Table 4. L-Bus (Local) Interface Signals
Signal
L_D
L_SC
FG
I/O Width
I/O
32 Local bus data.
Out
4 Local bus clock outputs.
I/O
8 Local frame groups.
Function
Table 5. Clock Circuit Interface Signals
Signal
XTAL1_IN
XTAL1_OUT
XTAL2_IN
XTAL2_OUT
I/O Width
Function
In
1 Crystal oscillator #1 input (16.384 MHz).
Out
1 Crystal oscillator #1 feedback.
In
1 Crystal oscillator #2 input (6.176 MHz or 12.352 MHz).
Out
1 Crystal oscillator #2 feedback.
Agere Systems Inc.
9

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