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TS3V914

3V RAIL TO RAIL CMOS QUAD OPERATIONAL AMPLIFIER

STMicroelectronics 

TS3V914

ELECTRICAL CHARACTERISTICS

VCC+ = 3V, VCC- = 0V, RL,CL connected to VCC/2, Tamb = 25oC (unless otherwise specified)

Symbol

Parameter

Vio

DVio

Iio

Iib

ICC

CMR

SVR

Avd

VOH

Input Offset Voltage (Vic = Vo = VCC/2)

Tmin. ≤ Tamb ≤ Tmax.

TS3V914

TS3V914A

TS3V914

TS3V914A

Input Offset Voltage Drift

Input Offset Current - (note 1)

Tmin. ≤ Tamb ≤ Tmax.

Input Bias Current - (note 1)

Tmin. ≤ Tamb ≤ Tmax.

Supply Current (per amplifier, AVCL = 1, no load)

Tmin. ≤ Tamb ≤ Tmax.

Common Mode Rejection Ratio

Vic = 0 to 3V, Vo = 1.5V

Supply Voltage Rejection Ratio (VCC+ = 2.7 to 3.3V, VO = VCC /2)

Large Signal Voltage Gain (RL = 10kΩ, VO = 1.2V to 1.8V)

Tmin. ≤ Tamb ≤ Tmax.

High Level Output Voltage (Vid = 1V)

RL = 10kΩ

RL = 600Ω

RL = 100Ω

TS3V914I/AI

Min. Typ. Max.

10

5

12

7

5

1

100

200

1

150

300

200 300

400

70

40

70

3

10

2

2.9 2.96

2.3

2.6

2

Tmin. ≤ Tamb ≤ Tmax.

VOL Low Level Output Voltage (Vid = -1V)

RL = 10kΩ

RL = 600Ω

RL = 10kΩ

RL = 600Ω

RL = 100Ω

2.8

2.1

50

100

300 400

900

Io

GBP

SR+

SR-

∅m

Tmin. ≤ Tamb ≤ Tmax.

Output Short Circuit Current (Vid = ±1V)

RL = 10kΩ

RL = 600Ω

Source

Sink

(Vo

(Vo

=

=

VVCCCC−+))

Gain Bandwidth Product

(AVCL = 100, RL = 10kΩ, CL = 100pF, f = 100kHz)

Positive Slew Rate

AVCL = 1, RL = 10kΩ, Vi =1.3V to 1.7V, CL = 100pF

Negative Slew Rate

Phase Margin

150

600

40

40

0.8

0.5

0.4

30

en Equivalent Input Noise Voltage (Rs = 100Ω, f = 1kHz)

30

VO1/VO2 Channel Separation (f = 1kHz)

120

Note 1 : Maximum values including unavoidable inaccuracies of the industrial test.

Unit

mV

µV/oC

pA

pA

µA

dB

dB

V/mV

V

mV

mA

MHz

V/µs

V/µs

Degrees

nV

√Hz

dB

3/12

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