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LC7471 Ver la hoja de datos (PDF) - SANYO -> Panasonic

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LC7471 Datasheet PDF : 12 Pages
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LC7471
Timing Characteristics at Ta = –30 to +75˚C, VDD1 = 5±0.5V
Parameter
Symbol
Conditions
SCLK input pulsewidth
CS HIGH-level input pulsewidth
CS data enable input setup time
SIN data input setup time
CS data enable input hold time
SIN data input hold time
16-bit data word write time
RAM data write time
tW(SCLK)
tW(CS)
tSU(CS)
tSU(SIN)
tH(CS)
tH(SIN)
tword
tWT
Ratings
Unit
min
typ
max
200
ns
1
µs
200
ns
200
ns
2
µs
200
ns
10
µs
1
µs
Input Timing
Data and address words are input in serial format on SIN.
A 16-bit address word followed by 16-bit data words is
input after the falling edge of CS. The address automati-
cally increments after each data word. The data input tim-
ing is shown in the following figure.
Only the lower eight bits of the address word are signifi-
cant. Only the lower eight bits of data words at addresses
000H to 0AFH, the lower 11 bits of data words at
addresses 0B0H to 0BBH and the lower 12 bits of data
words at addresses 0BCH to 0BFH are significant. All
non-significant bits should be set to 0.
No.4088–4/12

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