µ PD16434
(3) 16-time-division (multi-chip configuration)
Bank 0 and bank 1 are used in a pair, and the contents are read out to the column driver as 50 × 16-bit display
data.
The row driver signals, output from each µ PD16434, are R0 to R7 or R8 to R15.
Figure 2–8 shows bits correspondence for the row driver and column driver for the data memory for each chip.
Figure 2–8. Data Memory (16-Time-Division, Multi-chip)
Bank 0
Bank 1
31H 30H
bit 0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
01H 00H
R0
R1
R2
R3
R4
R5
R6
R7 Corresponding
R8 row signal
R9
R10
R11
R12
R13
R14
R15
C49 C48
C1 C0
To colmn driver
18
Data Sheet S10299EJ4V0DS00