Functional description
3
Functional description
M36P0R9070E0
The PSRAM and Flash memory components have separate power supplies but share the
same grounds. They are distinguished by two Chip Enable inputs: EF for Flash and EP for
the PSRAM.
Recommended operating conditions do not allow more than one device to be active at a
time. The most common example is a simultaneous read operations on the Flash memory
and the PSRAM which would result in a data bus contention. Therefore it is recommended
to put the other devices in the high impedance state when reading the selected device.
Figure 3. Functional block diagram
VDDF VPPF
A23-A24
EF
GF
WF
RPF
WPF
512 Mbit
Flash
Memory
DPDF
A0-A22
L
K
VCCP
WAIT
VSS VDDQ
DQ0-DQ15
EP
GP
WP
CRP
UBP
LBP
128Mbit
PSRAM
Ai11731
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