LTM4625(RevC) Ver la hoja de datos (PDF) - Analog Devices

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LTM4625
(Rev.:RevC)

20VIN, 5A Step-Down DC/DC µModule Regulator

Analog Devices 

LTM4625

APPLICATIONS INFORMATION

may be useful for comparing packages, but the test

conditions don’t generally match the user’s application.

3. θJCtop, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation flowing through the top of

the package. As the electrical connections of the typical

µModule regulator are on the bottom of the package, it

is rare for an application to operate such that most of

the heat flows from the junction to the top of the part.

As in the case of θJCbottom, this value may be useful

for comparing packages but the test conditions don’t

generally match the user’s application.

4. θJB, the thermal resistance from junction to the printed

circuit board, is the junction-to-board thermal resistance

where almost all of the heat flows through the bottom

of the µModule package and into the board, and is really

the sum of the θJCbottom and the thermal resistance of

the bottom of the part through the solder joints and

through a portion of the board. The board temperature

is measured a specified distance from the package.

A graphical representation of the aforementioned ther-

mal resistances is given in Figure 7; blue resistances are

contained within the μModule regulator, whereas green

resistances are external to the µModule package.

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD 51-12 or provided in the

Pin Configuration section replicates or conveys normal

operating conditions of a μModule regulator. For example,

in normal board-mounted applications, never does 100%

of the device’s total power loss (heat) thermally conduct

exclusively through the top or exclusively through bot-

tom of the µModule package—as the standard defines

for θJCtop and θJCbottom, respectively. In practice, power

loss is thermally dissipated in both directions away from

the package—granted, in the absence of a heat sink and

airflow, a majority of the heat flow is into the board.

Within the LTM4625 be aware there are multiple power

devices and components dissipating power, with a con-

sequence that the thermal resistances relative to different

junctions of components or die are not exactly linear with

respect to total package power loss. To reconcile this

complication without sacrificing modeling simplicity—but

also, not ignoring practical realities—an approach has been

taken using FEA software modeling along with laboratory

testing in a controlled environment chamber to reason-

ably define and correlate the thermal resistance values

supplied in this data sheet: (1) Initially, FEA software is

used to accurately build the mechanical geometry of the

JUNCTION

JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS

JUNCTION-TO-CASE (TOP)

RESISTANCE

CASE (TOP)-TO-AMBIENT

RESISTANCE

JUNCTION-TO-BOARD RESISTANCE

JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD

(BOTTOM) RESISTANCE

RESISTANCE

BOARD-TO-AMBIENT

RESISTANCE

AMBIENT

µMODULE DEVICE

4625 F07

Figure 7. Graphical Representation of JESD 51-12 Thermal Coefficients

For more information www.analog.com

Rev C

15

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