IDT71T016SA, 2.5V CMOS Static RAM
1 Meg (64K x 16-Bit)
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
0V to 2.5V
1.5ns
(VDD/2)
(VDD/2)
See Figure 1, 2 and 3
5326 tbl 09
AC Test Loads
I/O
Z0 = 50Ω
+1.25V
50Ω
30pF
Figure 1. AC Test Load
5326 drw 03
Commercial and Industrial Temperature Ranges
DATA OUT
5pF*
2.5V
320Ω
350Ω
5326 drw 04
*Including jig and scope capacitance.
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
7
•
6
∆tAA, tACS
(Typical, ns) 5
4
3
2
•
1
•
•
·
•
•
8 20 40 60 80 100 120 140 160 180 200
CAPACITANCE (pF)
5326 drw 05
Figure 3. Output Capacitive Derating
6.442