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CS4812

Fixed Function Multi-Effects Audio Processor

Cirrus Logic 

CS4812

TABLE OF CONTENTS

1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4

2. TYPICAL CONNECTION DIAGRAMS ................................................................................... 14

3. FUNCTIONAL DESCRIPTION ............................................................................................... 17

3.1 Overview .......................................................................................................................... 17

3.2 Analog Inputs ................................................................................................................... 17

3.2.1 Line Level Inputs ................................................................................................. 17

3.2.2 Digital High Pass Filter ........................................................................................ 18

3.3 Analog Outputs ................................................................................................................ 18

3.3.1 Line Level Outputs .............................................................................................. 18

3.4 Clock Generation ............................................................................................................. 19

3.4.1 Clock Source ....................................................................................................... 19

3.5 Serial Control Port ............................................................................................................ 19

3.5.1 SPI Bus ............................................................................................................... 19

3.5.1.1 SPI Master Mode ................................................................................ 20

3.5.1.2 SPI Slave Mode .................................................................................. 20

3.5.2 I2C Bus ................................................................................................................ 23

3.5.2.1 I2C Master Mode ................................................................................. 23

3.5.2.2 I2C Slave Mode ................................................................................... 24

3.6 Boot Modes ...................................................................................................................... 26

3.6.1 AutoBoot ............................................................................................................. 26

3.6.2 HostBoot ............................................................................................................. 26

3.7 Resets ............................................................................................................................. 27

4. POWER SUPPLY AND GROUNDING ................................................................................... 28

5. PIN DESCRIPTIONS .............................................................................................................. 29

6. PARAMETER DEFINITIONS .................................................................................................. 33

7. PACKAGE DIMENSIONS ...................................................................................................... 34

LIST OF FIGURES

Figure 1. SPI Control Port Slave Mode Timing .......................................................... 8

Figure 2. SPI Control Port Master Mode (AutoBoot) Timing ..................................... 9

Figure 3. I2C® Control Port Slave Mode Timing ...................................................... 11

Figure 4. I2C® Control Port Master Mode (AutoBoot) Timing .................................. 12

Figure 5. Typical Connection Diagram, Control Port Slave Mode ........................... 14

Figure 6. Typical Connection Diagram, Control Port I2C Master Mode ................... 15

Figure 7. Typical Connection Diagram, Control Port SPI Master Mode .................. 15

Figure 8. Typical Connection Diagram, Control Port I2C Slave Mode ..................... 16

Figure 9. Typical Connection Diagram, Control Port SPI Slave Mode .................... 16

Figure 10.Recommended Line Input Buffer .............................................................. 17

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:

http://www.cirrus.com/corporate/contacts/

Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-

mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information

contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any

kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third

parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publi-

cation may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise)

without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the

printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photo-

graphic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or

sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in

this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade-

marks and service marks can be found at http://www.cirrus.com.

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DS291PP3

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