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MC56F8014 Datasheet PDF : 124 Pages
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Table 2-3 56F8014 Signal and Package Information for the 32-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
GPIOB5
3
(T1)
(FAULT3)
TCK
15
(GPIOD2)
TMS
30
(GPIOD3)
TDI
29
(GPIOD0)
Input/
Output
Input/
Output
Input
Input
Input/
Output
Input
Input/
Output
Input
Input/
Output
Input with
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
T1 — Timer, Channel 1
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
After reset, the default state is GPIOB5. The alternative peripheral
functionality is controlled via the SIM. See Section 6.3.8.
Input with
internal
pull-up
enabled
Test Clock Input — This input pin provides a gated clock to
synchronize the test logic and shift serial data to the JTAG/EOnCE
port. The pin is connected internally to a pull-up resistor. A Schmitt
trigger input is used for noise immunity.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TCK.
Input with
internal
pull-up
enabled
Test Mode Select Input — This input pin is used to sequence the
JTAG TAP controller’s state machine. It is sampled on the rising
edge of TCK and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TMS.
Note: Always tie the TMS pin to VDD through a 2.2K resistor if this pin
is configured as TMS.
Input with
internal
pull-up
enabled
Test Data Input — This input pin provides a serial input data stream
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDI.
Return to Table 2-2
56F8014 Technical Data, Rev. 11
20
Freescale Semiconductor
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