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CY14B108N-ZSP25XCT Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza
componentes Descripción
Fabricante
CY14B108N-ZSP25XCT
Cypress
Cypress Semiconductor Cypress
CY14B108N-ZSP25XCT Datasheet PDF : 24 Pages
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CY14B108L, CY14B108N
Software Controlled STORE/RECALL Cycle
In the following table, the software controlled STORE and RECALL cycle parameters are listed.[21, 22]
Parameters
Description
tRC
tSA
tCW
tHA
tRECALL
STORE/RECALL Initiation Cycle Time
Address Setup Time
Clock Pulse Width
Address Hold Time
RECALL Duration
20 ns
25 ns
45 ns
Unit
Min Max Min Max Min Max
20
25
45
ns
0
0
0
ns
15
20
30
ns
0
0
0
ns
200
200
200
μs
Switching Waveforms
Figure 11. CE and OE Controlled Software STORE/RECALL Cycle[22]
Address
tRC
Address #1
tSA
tCW
tRC
Address #6
tCW
CE
tSA
OE
HSB (STORE only)
DQ (DATA)
tLZCE
tHA
tHA
tHZCE
tHA
tHA
t DELAY
23
Note
High Impedance
tSTORE/tRECALL
tHHHD
tLZHSB
RWI
Figure 12. Autostore Enable/Disable Cycle
Address
CE
tSA
tRC
Address #1
tSA
tCW
OE
DQ (DATA)
tLZCE
tHA
tHA
tHZCE
tRC
Address #6
tCW
tHA
tHA
23
Note
tSS
t DELAY
Notes
21. The software sequence is clocked with CE controlled or OE controlled reads.
22. The six consecutive addresses must be read in the order listed in Table 2 on page 6. WE must be HIGH during all six consecutive cycles.
23. DQ output data at the sixth read may be invalid since the output is disabled at tDELAY time.
Document #: 001-45523 Rev. *D
Page 14 of 24
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