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ADN2848ACP-32

3 V Dual-Loop 50 Mbps to 1.25 Gbps Laser Diode Driver

Analog Devices 

ADN2848

Caution must be used when choosing component values for ac

coupling to ensure that the time constant (L/R and RC, see

Figure 7) are sufficiently long for the data rate and expected

number of CIDs (consecutive identical digits). Failure to do this

could lead to pattern dependent jitter and vertical eye closure.

For designs with low series resistance, or where external

components become impractical, the ADN2848 supports direct

connection to the laser diode (see Figure 6). In this case, care

must be taken to ensure that the voltage drop across the laser

diode does not violate the minimum compliance voltage on the

IMODP pin.

Optical Supervisor

The PSET and ERSET potentiometers may be replaced with a

dual-digital potentiometer, the ADN2850 (see Figure 5). The

ADN2850 provides an accurate digital control for the average

optical power and extinction ratio and ensures excellent stability

over temperature.

VCC

VCC

IMPD

VCC

ADN2848

TX

RX

CLK

CS

ADN2850

SDI

SDO

DAC1

CLK

CS

DAC2

PSET

ERSET

IMODP

IBIAS

DATAP

DATAN

IDTONE

Figure 5. Application Using the ADN2850 Dual 10-Bit

Digital Potentiometer with Extremely Low Temperature

Coefficient as an Optical Supervisor

ALS

1k⍀

1.5k⍀

1.5k⍀

24

17

FAIL

DEGRADE

VCC

MPD

VCC

*

LD

*

*

*

25

VCC2

IMODN

GND2

IMODP

GND2

GND2

10␮H

IBIAS

CCBIAS

VCC 32

1

ADN2848

** **

1.5k⍀

16

CLKN

10nF

CLKN

CLKP

GND1

DATAP

10nF

10nF

CLKP

DATAP

DATAN

VCC1

PAVCAP

10nF

1␮F

DATAN

ERCAP

9 1␮F

VCCs SHOULD HAVE BYPASS CAPACITORS AS CLOSE

AS POSSIBLE TO THE ACTUAL SUPPLY PINS ON THE

8

ADN2848 AND THE LASER DIODE USED.

CONSERVATIVE DECOUPLING WOULD INCLUDE 100pF

CAPACITORS IN PARALLEL WITH 10nF CAPACITORS.

VCC

LD = LASER DIODE

MPD = MONITOR PHOTODIODE

10nF

10nF

10nF 10nF 10␮F

GND

NOTES

* DESIGNATES COMPONENTS THAT NEED TO BE OPTIMIZED FOR THE TYPE OF LASER USED.

** FOR DIGITAL PROGRAMMING, THE ADN2850 OR THE ADN2860 OPTICAL SUPERVISOR CAN BE USED.

Figure 6. DC-Coupled 50 Mbps to 1.25 Gbps Test Circuit, Data Not Clocked

REV. 0

–7–

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