ISL6432CB Ver la hoja de datos (PDF) - Renesas Electronics

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Fabricante

ISL6432CB

PWM and Triple Linear Power Controller for Home Gateway Applications

Renesas Electronics 

ISL6432

soft-start initiates a ramp-up attempt of the failed output, at time

T2, bringing the output in regulation at time T4.

To exemplify an UV event on one of the linears, at time T1, the

clock regulator (VOUT2) is also subjected to an overcurrent

event, resulting in an UV condition. Similarly, after three soft-

start periods, the fourth cycle initiates a ramp-up of this linear

output at time T3. One soft-start period after T3, the linear

output is within regulation limits. UV glitches less than 1s

(typically) in duration are ignored.

(0.5V/DIV.)

0V

UV MONITORING

VOUT3 (1.8V)

VOUT4 (1.5V)

VOUT2 (2.5V)

VOUT1 (2.5V)

ACTIVE

SOFT-START

FUNCTION

INACTIVE

T0

T1

TIME

T2

T3 T4

FIGURE 1. OVERCURRENT/UNDERVOLTAGE PROTECTION

RESPONSE

As overcurrent protection is performed on the synchronous

switcher regulator on a cycle-by-cycle basis, OC monitoring is

active as long as the regulator is operational. Since the

overcurrent protection on the linear regulators is performed

through undervoltage monitoring at the feedback pins (FB2,

FB3, and FB4), this feature is activated approximately 25%

into the soft-start interval (see Figure 1).

A resistor (ROCSET) programs the overcurrent trip level for

the PWM converter. As shown in Figure 2, the internal 40A

current sink (IOCSET) develops a voltage across ROCSET

(VSET) that is referenced to VIN . The DRIVE signal enables

the overcurrent comparator (OCC). When the voltage across

the upper MOSFET (VDS(ON)) exceeds VSET, the

overcurrent comparator trips to set the overcurrent latch. Both

VSET and VDS(ON) are referenced to VIN and a small

capacitor across ROCSET helps VOCSET track the variations

of VIN due to MOSFET switching. The overcurrent function

will trip at a peak inductor current (IPEAK) determined by:

IPEAK = I--O-----C----S----Er--D--T---S------OR----N-O----C-----S----E---T--

The OC trip point varies with MOSFET’s rDS(ON) temperature

variations. To avoid overcurrent tripping in the normal

FN9019 Rev 0.00

Jun 1, 2001

operating load range, determine the ROCSET resistor from

the equation above with:

1. The maximum rDS(ON) at the highest junction temperature.

2. The minimum IOCSET from the specification table.

3. Determine IPEAK for IPEAK > IOUT(MAX) + (I)/2, where I

is the output inductor ripple current.

OVERCURRENT TRIP:

VDS > VSET

iD  rDSON > IOCSET  ROCSET

OCSET

VIN = +5V

ROCSET

IOCSET

40A

DRIVE

VSET +

VCC

UGATE

iD

+

VDS(ON)

OC

+

-

OCC

PWM

GATE

CONTROL

PHASE

VPHASE = VIN – VDS

VOCSET = VIN – VSET

FIGURE 2. OVERCURRENT DETECTION

For an equation for the ripple current see the section under

component guidelines titled ‘Output Inductor Selection’.

+3.3VIN

VOUT3

+

COUT3

Q4

DRIVE3

FB3

RS3

RP3

Q5

VOUT4

+

COUT4

DRIVE4

RS4

FB4

RP4

ISL6432

VOUT

=

0.8









1

+

R-R----SP--

FIGURE 3. ADJUSTING THE OUTPUT VOLTAGE OF ANY OF

THE FOUR REGULATORS (OUTPUTS 3 AND 4

PICTURED)

Output Voltage Selection

The output voltage of the PWM converter can be resistor-

programmed to any level between VIN and 0.8V. However,

since the value of RS1 is affecting the values of the rest of the

compensation components, it is advisable its value is kept

between 2k and 5k.

All linear regulators’ output voltages are set by means of

external resistor dividers as shown in Figure 3. The two

resistors used to set the voltage on each of the three linear

regulators have to meet the following criteria: their value while

in a parallel connection has to be less than 5k, or otherwise

said, the following relationship has to be met:

-RR----SS-----+-----RR-----PP-  5k

There may be a second restriction on the size of the resistors

used to set the linear regulators’ output voltage based on ACPI

Page 6 of 12

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