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HV310LG-G Ver la hoja de datos (PDF) - Supertex Inc

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componentes Descripción
Fabricante
HV310LG-G Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
HV310
Timing Diagram
contact
bounce
GND
VIN
VOUT
-48V
VUVL
VOUT
VIN
VRAMP
VGATE
V EE
IIN
tSTART
VRAMP
V
VGATE
GS(th)
VGS(lim)
tTH
tPOR
ILIM
V GATE
ILIM =
VSENSE
RSENSE
tSTART = 12V
CRAMP
IRAMP
tTH
=
VGS(th)
CRAMP
IRAMP
tPOR = tSTART + tTH
tRISE
gfs
CRAMP
IRAMP - RSENSE
0.9ILIM
RFB
active
PWRGD
inactive
tRISE
Initialization
PtWRGD
tLIM
Limiting
Full On
tLIM ≈ VIN
CLOAD
ILIM
-
1
2
tRISE
tPWRGD
=
(VINT
-
VGS(LIM)
-
1.2V)
CRAMP
IRAMP
Note:
1. VINT is the internally regulated supply voltage and can range from 9.0 to 11V.
2. VGS(th) is the gate threshold voltage of the external pass transistor and may be obtained from its datasheet.
3. VGS(lim) is the pass transistor gate-source voltage required to obtain the limit curent. It is dependent on the pass transistor’s characteristics and may
be obtained from the transfer characteristics curves on the transistor datasheet.
4. gfs is the transconductance of the pass transistor and may be obtained from its datasheet.
5. RFB is the internal feedback resistor and is 5.0kΩ nominal.
Functional Block Diagram
VDD
UV
Internal
Supply
Regulator
Band Gap
Reference
VINT
VREF
UVLO
and
POR
C
PWRGD
VREF
LOGIC
C
OV
VINT
2VREF
Automatic
Restart
Delay
10mA
C
VINT - 1.2V
-
Transconductor
+
Circuit
Breaker
C
100mV
A
Switch
Buffer
VEE
5kΩ
SENSE
RAMP
GATE
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
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