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29F010

1 Megabit (128 K x 8-bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory

Advanced Micro Devices 

DQ5: Exceeded Timing Limits

DQ5 indicates whether the program or erase time has

exceeded a specified internal pulse count limit. Under

these conditions DQ5 produces a “1.” This is a failure

condition that indicates the program or erase cycle was

not successfully completed.

The DQ5 failure condition may appear if the system

tries to program a “1” to a location that is previously

programmed to “0.” Only an erase operation can

change a “0” back to a “1.” Under this condition, the

device halts the operation, and when the operation has

exceeded the timing limits, DQ5 produces a “1.”

Under both these conditions, the system must issue

the reset command to return the device to reading

array data.

DQ3: Sector Erase Timer

After writing a sector erase command sequence, the

system may read DQ3 to determine whether or not an

erase operation has begun. (The sector erase timer

does not apply to the chip erase command.) If addi-

tional sectors are selected for erasure, the entire time-

out also applies after each additional sector erase

command. When the time-out is complete, DQ3

switches from “0” to “1.” The system may ignore DQ3

if the system can guarantee that the time between ad-

ditional sector erase commands will always be less

than 50 µs. See also the “Sector Erase Command Se-

quence” section.

After the sector erase command sequence is written,

the system should read the status on DQ7 (Data# Poll-

ing) or DQ6 (Toggle Bit I) to ensure the device has ac-

cepted the command sequence, and then read DQ3. If

DQ3 is “1”, the internally controlled erase cycle has be-

gun; all further commands are ignored until the erase

operation is complete. If DQ3 is “0”, the device will ac-

cept additional sector erase commands. To ensure the

command has been accepted, the system software

should check the status of DQ3 prior to and following

each subsequent sector erase command. If DQ3 is

high on the second status check, the last command

might not have been accepted. Table 5 shows the out-

puts for DQ3.

Table 5. Write Operation Status

Operation

DQ7

(Note 1)

DQ6

DQ5

(Note 2)

DQ3

Embedded Program Algorithm

DQ7#

Toggle

0

N/A

Embedded Erase Algorithm

0

Toggle

0

1

Notes:

1. DQ7 requires a valid address when reading status information. Refer to the appropriate subsection for further details.

2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.

See “DQ5: Exceeded Timing Limits” for more information.

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Am29F010

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