SM5904BF Ver la hoja de datos (PDF) - Nippon Precision Circuits

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componentes Descripción

Fabricante

SM5904BF

compression and non compression type shock-proof memory controller

Nippon Precision Circuits  

SM5904BF

Serial output (ZSRDATA, ZLRCK, ZSCK pins)

Parameter

Symbol Condition

Rating

Unit

Min

Typ

Max

ZSCK pulsewidth

tSCOW

15 pF load

1/96fs

ZSCK pulse cycle

tSCOY

15 pF load

1/48fs

ZSRDATA and ZLRCK output delay time

tDHL

15 pF load

0

60

ns

tDLH

15 pF load

0

60

ns

ZSCK

ZSRDATA

ZLRCK

t t SCOW

SCOW

t SCOY

t DHL

0.5VDD

0.5VDD

t DLH

DRAM access timing (NRAS, NCAS2, NWE, A0 to A9, D0 to D3)

Parameter

NRAS pulsewidth

NRAS falling edge to NCAS2 falling edge

NCAS2 pulsewidth

NRAS

Setup time

falling edge to address

Hold time

NCAS2

Setup time

falling edge to address

Hold time

NCAS2

Setup time

falling edge to data write

Hold time

NCAS2

Input setup

rising edge to data read

Input hold

NWE pulsewidth

NWE falling edge to NCAS2 falling edge

Refresh cycle

(fs = 44.1 kHz playback)

Memory system ON

Decode sequence operation(READ=H)

Symbol

Condition

Min

tRASL

15 pF load

tRASH

15 pF load

3

tRCD

15 pF load

tCASH

15 pF load

5

tCASL

15 pF load

tRADS

15 pF load

tRADH

15 pF load

tCADS

15 pF load

tCADH

15 pF load

tCWDS

15 pF load

tCWDH

15 pF load

tCRDS

40

tCRDH

0

tWEL

15 pF load

tWCS

15 pF load

tREF

Non compression

4M 6-bit compression

DRAM 5-bit compression

× 1 or × 2 4-bit compression

Note. tCY is the system clock (CLK) input (384fs) cycle time. tCY = 59 ns when fs = 44.1 kHz

Rating

Typ

5

2

3

1

1

1

5

3

3

6

3

Unit

Max

tCY(note)

tCY

tCY

tCY

tCY

tCY

tCY

tCY

tCY

tCY

tCY

ns

ns

tCY

tCY

2.8

ms

7.3

ms

8.8

ms

10.9

ms

NIPPON PRECISION CIRCUITS-8

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