MC100LVEL31(2016) Ver la hoja de datos (PDF) - ON Semiconductor
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MC100LVEL31 Datasheet PDF : 6 Pages
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MC100LVEL31
Table 6. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
fmax
Maximum Toggle Frequency
tPLH
Propagation Delay
tPHL
to Output
2.7
2.9
2.9
GHz
ps
CLK 365 465 580 375 475 590 415 530 630
S, R 385 475 620 395 485 630 435 525 670
tS
tH
tRR
tJITTER
tPW
Setup Time
Hold Time
Set/Reset Recovery
Cycle-to-Cycle Jitter
Minimum Pulse Width
CLK
Set, Reset
150
0
150
0
150
0
ps
250 100
250 100
250 100
400 200
400 200
400 200
ps
TBD
TBD
TBD
ps
ps
340
340
340
600
600
600
tr
Output Rise / Fall Times Q (20%−80%) 120 220 320 120 220 320 120 220 320 ps
tf
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary ±0.3 V.
Q
Driver
Device
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices)
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
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