AT91SAM9G45(2009) Ver la hoja de datos (PDF) - Atmel Corporation
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AT91SAM9G45 Datasheet PDF : 1159 Pages
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AT91SAM9G45
6438D–ATARM–13-Oct-09
24 Peripheral DMA Controller (PDC) ....................................................... 317
24.1 Description .....................................................................................................317
24.2 Embedded Characteristics ............................................................................317
24.3 Block Diagram ...............................................................................................319
24.4 Functional Description ...................................................................................319
24.5 Peripheral DMA Controller (PDC) User Interface ..........................................322
25 Clock Generator ................................................................................... 333
25.1 Description .....................................................................................................333
25.2 Embedded Characteristics ............................................................................333
25.3 Slow Clock Crystal Oscillator .........................................................................333
25.4 Slow Clock RC Oscillator ...............................................................................334
25.5 Slow Clock Selection .....................................................................................334
25.6 Main Oscillator ...............................................................................................337
25.7 Divider and PLLA Block .................................................................................338
25.8 UTMI Bias and Phase Lock Loop Programming ...........................................339
26 Power Management Controller (PMC) ................................................ 340
26.1 Description .....................................................................................................340
26.2 Embedded Characteristics ............................................................................340
26.3 Master Clock Controller .................................................................................342
26.4 Processor Clock Controller ............................................................................342
26.5 USB Device and Host clocks .........................................................................343
26.6 LP-DDR/DDR2 Clock ....................................................................................343
26.7 Peripheral Clock Controller ............................................................................343
26.8 Programmable Clock Output Controller .........................................................344
26.9 Programming Sequence ................................................................................344
26.10 Clock Switching Details .................................................................................348
26.11 Power Management Controllerr (PMC) User Interface .................................351
27 Advanced Interrupt Controller (AIC) .................................................. 371
27.1 Description .....................................................................................................371
27.2 Embedded Characteristics ............................................................................371
27.3 Block Diagram ...............................................................................................372
27.4 Application Block Diagram .............................................................................372
27.5 AIC Detailed Block Diagram ..........................................................................372
27.6 I/O Line Description .......................................................................................373
27.7 Product Dependencies ..................................................................................373
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