HL15703
1/3 bias ( for use with large panels )
+5V
*1)
C ≥ 0.047uF
R
•
R
CC •
R
From the controller
To the controller
To the controller
power supply
*3)
OSC
VDD
VSS
TEST
VCL1
VCL2
COM1
COM2
COM3
P1 / SEG1
P2 / SEG2
P3 / SEG3
P4 / SEG4
SE.....G5
SEG55
SS
EE
RES *2)
CE
GG
55
66
SCK K K K K K
//
SI I I I I I K K K K K K
SO
N N N N NS S S S S S
5 4 3 2 16 5 4 32 1
(p 1)
(p 2)
(p 3)
(p 4)
(general-purpose
output ports)
Used with the
backlight controller
or other circuit.
.....
(SEG56)
(SEG57)
Key matrix
(up to 30 keys)
•
•¡ ¡Æ Æ
Note : *1). Add a capacitor to the power supply line so that the power supply voltage VDD rise time when power is
applied and the power supply voltage VDD fall time when power drops are both at least 1 ms, as the
HL15703 is reset by the SVD.
*2). If the RES pin is not used for system reset, it must be connected to VDD
*3). The SO pin, being an open-drain output, requires a pull-up resistor, Select a resistance (between 1 to 10kΩ)
appropriate for the capacitance of the external wiring so that signal waveforms are not degraded.
26
Preliminary