LH28F800SGN-L10 Ver la hoja de datos (PDF) - Sharp Electronics
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LH28F800SGN-L10 Datasheet PDF : 42 Pages
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LH28F800SG-L (FOR SOP)
Start
Write 60H,
Block/Device Address
Write 01H/F1H,
Block/Device Address
Read
Status Register
0
SR.7 =
1
Full Status
Check if Desired
Set Lock-Bit
Complete
BUS
OPERATION COMMAND
COMMENTS
Write
Set
Block/Permanent
Lock-Bit
Setup
Data = 60H
Addr = Block Address (Block),
Device Address (Permanent)
Write
Set
Data = 01H (Block),
Block or Permanent
F1H (Permanent)
Lock-Bit
Addr = Block Address (Block),
Confirm
Device Address (Permanent)
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent lock-bit set operations.
Full status check can be done after each lock-bit set
operation or after a sequence of lock-bit set operations.
Write FFH after the last lock-bit set operation to place device
in read array mode.
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
1
SR.3 =
0
VPP Range Error
1
SR.1 =
0
Device Protect Error
1
SR.4, 5 =
0
Command Sequence
Error
1
SR.4 =
0
Set Lock-Bit
Error
BUS
OPERATION COMMAND
COMMENTS
Standby
Check SR.3
1 = VPP Error Detect
Standby
Check SR.1
1 = Device Protect Detect
RP# = VIH
(Set Permanent Lock-Bit Operation)
RP# = VIH or
Permanent Lock-Bit is Set
(Set Block Lock-Bit Operation)
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Standby
Check SR.4
1 = Set Lock-Bit Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple lock-bits are
set before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
Set Lock-Bit
Successful
Fig. 7 Set Block and Permanent Lock-Bit Flowchart
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