MPC7410VS500LC Ver la hoja de datos (PDF) - Unspecified

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MPC7410VS500LC

MPC7410 RISC Microprocessor Hardware Specifications

Unspecified 

Electrical and Thermal Characteristics

Figure 5 provides the mode select input timing diagram for the MPC7410. The mode select inputs are sampled

twice, once before and once after HRESET negation.

SYSCLK

VM

VM

HRESET

Mode Signals

First sample

Second sample

VM = Midpoint Voltage (OVDD/2)

Figure 5. Mode Input Timing Diagram

Figure 6 provides the input/output timing diagram for the MPC7410.

SYSCLK

VM

VM

VM

All Inputs

tIVKH

tIXKH

All Outputs

(Except TS, ABB,

ARTRY, DBB)

All Outputs

(Except TS, ABB,

ARTRY, DBB)

TS,

ABB/AMON(0),

DBB/DMON(0)

ARTRY,

SHD0,

SHD1

tKHOV

tKHOX

tkhoe

tKHOZ

tKHTSV

tKHABPZ

tKHTSV

tKHTSX

tKHARV

tKHARP

tKHARX

VM = Midpoint Voltage (OVDD/2)

Figure 6. Input/Output Timing Diagram

tKHARPZ

tKHARV

MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1

Freescale Semiconductor

17

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