UPSD3212A, UPSD3212C, UPSD3212CV
Architecture overview
2.8
2.8.1
Addressing modes
The addressing modes in UPSD321xx devices instruction set are as follows
1. Direct addressing
2. Indirect addressing
3. Register addressing
4. Register-specific addressing
5. Immediate constants addressing
6. Indexed addressing
Direct addressing
In a direct addressing the operand is specified by an 8-bit address field in the instruction.
Only internal Data RAM and SFRs (80~FFH RAM) can be directly addressed.
Example:
mov A, 3EH ; A <----- RAM[3E]
Figure 10. Direct addressing
Program Memory
3Eh
04
A
2.8.2
AI06641
Indirect addressing
In indirect addressing the instruction specifies a register which contains the address of the
operand. Both internal and external RAM can be indirectly addressed. The address register
for 8-bit addresses can be R0 or R1 of the selected register bank, or the Stack Pointer. The
address register for 16-bit addresses can only be the 16-bit “data pointer” register, DPTR.
Example:
mov @R1, #40 H ;[R1] <-----40H
Figure 11. Indirect addressing
Program Memory
55h 40h
R1
55
AI06642
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