VIPER100A-E Ver la hoja de datos (PDF) - STMicroelectronics

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componentes Descripción

Fabricante

VIPER100A-E

SMPS PRIMARY I.C.

STMicroelectronics 

5 Operation Description

VIPer100A-E/ASP-E

5.5 External Clock Synchronization:

The OSC pin provides a synchronisation capability when connected to an external frequency

source. Figure 21 shows one possible schematic to be adapted, depending the specific needs.

If the proposed schematic is used, the pulse duration must be kept at a low value (500ns is

sufficient) for minimizing consumption. The optocoupler must be able to provide 20mA through

the optotransistor.

5.6

Primary Peak Current Limitation

The primary IDPEAK current and, consequently, the output power can be limited using the

simple circuit shown in Figure 22 . The circuit based on Q1, R1 and R2 clamps the voltage on

the COMP pin in order to limit the primary peak current of the device to a value:

IDPEAK

=

V-----C----O---M-----P----–----0---.--5-

HID

where:

VCOMP=

0.6 × -R----1---+-----R-----2

R2

The suggested value for R1+R2 is in the range of 220KΩ.

5.7 Over-Temperature Protection

Over-temperature protection is based on chip temperature sensing. The minimum junction

temperature at which over-temperature cut-out occurs is 140ºC, while the typical value is

170ºC. The device is automatically restarted when the junction temperature decreases to the

restart temperature threshold that is typically 40ºC below the shutdown value (see Figure 13)

14/31

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