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ST72324J2-AUTO Ver la hoja de datos (PDF) - STMicroelectronics

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ST72324J2-AUTO Datasheet PDF : 194 Pages
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ST72324xx-Auto
3
Register and memory map
Register and memory map
As shown in Figure 4, the MCU is capable of addressing 64 Kbytes of memories and I/O
registers.
The available memory locations consist of 128 bytes of register locations, up to 1024 bytes
of RAM and up to 32 Kbytes of user program memory. The RAM space includes up to 256
bytes for the stack from 0100h to 01FFh.
The highest address bytes contain the user reset and interrupt vectors.
Caution: Never access memory locations marked as ‘Reserved’. Accessing a reserved area can
have unpredictable effects on the device.
) Figure 4. Memory map
uct(s 0000h
rod 007Fh
0080h
HW registers
(see Table 3)
P RAM
te (1024, 512 or 384 bytes)
le 047Fh
0480h
so 7FFFh
b 8000h
Reserved
Program memory
O FFDFh
(32, 16 or 8 Kbytes)
- FFE0h Interrupt and reset vectors
t(s) FFFFh
(see Table 25)
0080h
00FFh
0100h
01FFh
0200h
027Fh
or 047Fh
Short addressing
RAM (zero page)
256 bytes stack
16-bit addressing
RAM
8000h
32 Kbytes
C000h
16 Kbytes
E000h
8 Kbytes
FFFFh
roduc Table 3. Hardware register map
P Address Block Register label
Register name
te 0000h
le 0001h
o 0002h
bs0003h
O 0004h
Port A(1)
Port B(1)
PADR
PADDR
PAOR
PBDR
PBDDR
Port A data register
Port A data direction register
Port A option register
Port B data register
Port B data direction register
Reset status Remarks
00h(2)
00h
00h
00h(2)
00h
R/W
R/W
R/W
R/W
R/W
0005h
PBOR
Port B option register
00h
R/W
0006h
0007h
0008h
Port C
PCDR
PCDDR
PCOR
Port C data register
Port C data direction register
Port C option register
00h(2)
00h
00h
R/W
R/W
R/W
0009h
000Ah
000Bh
Port D(1)
PDADR
PDDDR
PDOR
Port D data register
Port D data direction register
Port D option register
00h(2)
00h
00h
R/W
R/W
R/W
000Ch
000Dh
000Eh
Port E(1)
PEDR
PEDDR
PEOR
Port E data register
Port E data direction register
Port E option register
00h(2)
00h
00h
R/W
R/W(1)
R/W(1)
Doc ID 13841 Rev 1
19/193

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