0.5Ω, Quad SPDT Switches in UCSP/QFN
Pin Configurations/Truth Tables
TOP VIEW
(BUMP SIDE DOWN)
MAX4754/MAX4754A/MAX4755/
MAX4756/MAX4756A
1
2
3
4
+
A NC1
NO4 COM4 NC4
B COM1
V+
INB
(EN)
NO2
C NO1
INA
GND COM2
D NC3 COM3 NO3
NC2
( ) FOR MAX4756/MAX4756A.
UCSP
MAX4754/MAX4754A/MAX4755
INA NO1/NO2 NC1/NC2 NO3/NO4 NC3/NC4
LOW OFF
ON
—
—
HIGH
ON
OFF
—
—
INB
LOW
—
HIGH
—
—
OFF
ON
—
ON
OFF
MAX4754
MAX4754A
MAX4755
MAX4756
MAX4756A
12 11 10 9
NO3 13
GND 14
COM3 15
NC3 16
+
EP*
12 3 4
8 NC4
7 COM4
6 V+
5 NO4
TQFN
*EP: EXPOSED PADDLE CONNECTED TO GND.
MAX4756/MAX4756A
EN
INA
NO_ NC_
LOW LOW OFF
ON
LOW HIGH ON
OFF
HIGH
X
OFF
OFF
HIGH
X
OFF
OFF
PROCESS: CMOS
Chip Information
12 ______________________________________________________________________________________