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KSZ9031RNX

Gigabit Ethernet Transceiver with RGMII Support

Microchip Technology 

KSZ9031RNX

In 10BASE-T/100BASE-TX mode, the adaptive equalizer needs only to remove the inter-symbol interference and

recover the channel loss from the incoming data.

3.2.6 TRELLIS ENCODER AND DECODER

In 1000BASE-T mode, the transmitted 8-bit data is scrambled into 9-bit symbols and further encoded into 4D-PAM5

symbols. The initial scrambler seed is determined by the specific PHY address to reduce EMI when more than one

KSZ9031RNX is used on the same board. On the receiving side, the idle stream is examined first. The scrambler seed,

pair skew, pair order, and polarity must be resolved through the logic. The incoming 4D-PAM5 data is then converted

into 9-bit symbols and de-scrambled into 8-bit data.

3.3 Auto MDI/MDI-X

The Automatic MDI/MDI-X feature eliminates the need to determine whether to use a straight cable or a crossover cable

between the KSZ9031RNX and its link partner. This auto-sense function detects the MDI/MDI-X pair mapping from the

link partner, and assigns the MDI/MDI-X pair mapping of the KSZ9031RNX accordingly.

Table 3-1 shows the KSZ9031RNX 10/100/1000 pin configuration assignments for MDI/MDI-X pin mapping.

TABLE 3-1: MDI/MDI-X PIN MAPPING

Pin

(RJ-45 Pair)

1000BASE-T

MDI

100BASE-T

10BASE-T

1000BASE-T

MDI-X

100BASE-T

10BASE-T

TXRXP/M_A

(1, 2)

TXRXP/M_B

(3, 6)

TXRXP/M_C

(4, 5)

TXRXP/M_D

(7, 8)

A+/–

B+/–

C+/–

D+/–

TX+/–

RX+/–

Not Used

Not Used

TX+/–

RX+/–

Not Used

Not Used

B+/–

A+/–

D+/–

C+/–

RX+/–

TX+/–

Not Used

Not Used

RX+/–

TX+/–

Not Used

Not Used

Auto MDI/MDI-X is enabled by default. It is disabled by writing a one to Register 1Ch, Bit [6]. MDI and MDI-X mode is

set by Register 1Ch, Bit [7] if Auto MDI/MDI-X is disabled.

An isolation transformer with symmetrical transmit and receive data paths is recommended to support Auto MDI/MDI-X.

3.4 Pair-Swap, Alignment, and Polarity Check

In 1000BASE-T mode, the KSZ9031RNX

• Detects incorrect channel order and automatically restores the pair order for the A, B, C, D pairs (four channels).

• Supports 50 ns ±10 ns difference in propagation delay between pairs of channels in accordance with the IEEE

802.3 standard, and automatically corrects the data skew so the corrected four pairs of data symbols are synchro-

nized.

Incorrect pair polarities of the differential signals are automatically corrected for all speeds.

3.5 Wave Shaping, Slew-Rate Control, and Partial Response

In communication systems, signal transmission encoding methods are used to provide the noise-shaping feature and

to minimize distortion and error in the transmission channel.

• For 1000BASE-T, a special partial-response signaling method is used to provide the band-limiting feature for the

transmission path.

• For 100BASE-TX, a simple slew-rate control method is used to minimize EMI.

• For 10BASE-T, pre-emphasis is used to extend the signal quality through the cable.

3.6 PLL Clock Synthesizer

The KSZ9031RNX generates 125 MHz, 25 MHz, and 10 MHz clocks for system timing. Internal clocks are generated

from the external 25 MHz crystal or reference clock.

DS00002117C-page 16

 2016 Microchip Technology Inc.

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