80C188EB25 Ver la hoja de datos (PDF) - Intel

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80C188EB25

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Intel 

80C186EB 80C188EB 80L186EB 80L188EB

AC SPECIFICATIONS

AC Characteristics 80L186EB13 80L186EB8 (Continued)

Symbol

Parameter

13 MHz

Min Max

8 MHz

Units

Not Available

SYNCHRONOUS INPUTS

TCHIS

TEST, NMI, INT4:0,

20

ns

BCLK1 0 T1 0IN READY

CTS1 0 P2 6 P2 7

TCHIH

TEST, NMI, INT4:0, T1:0IN,

3

ns

BCLK1 0 READY CTS1 0

TCLIS

AD15:0 (AD7:0), READY

20

ns

TCLIH

READY, AD15:0 (AD7:0)

3

ns

TCLIS

HOLD

20

ns

TCLIH

HOLD

3

ns

NOTES

1 See AC Timing Waveforms for waveforms and definition

2 Measured at VIH for high time VIL for low time

3 Only required to guarantee ICC Maximum limits are bounded by TC TCH and TCL

4 Specified for a 50 pF load see Figure 13 for capacitive derating information

5 Specified for a 50 pF load see Figure 14 for rise and fall times outside 50 pF

6 See Figure 14 for rise and fall times

7 TCHOV1 applies to BHE (RFSH) LOCK and A19 16 only after a HOLD release

8 TCHOV2 applies to RD and WR only after a HOLD release

9 Setup and Hold are required to guarantee recognition

10 Setup and Hold are required for proper operation

Notes

1, 9

1, 9

1, 10

1, 10

1, 9

1, 9

35

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