AC Loading and Waveforms
TABLE 1. Values for Figure 1
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
SWITCH
Open
VL
GND
FIGURE 3. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50Ω)
Symbol
Vmi
Vmo
Vx
Vy
VL
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
6V
VCC
2.7V
2.5V ± 0.2V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
6V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
VCC*2
1.8 ± 0.15V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
VCC*2
FIGURE 4. Waveform for Inverting and
Non-inverting Functions
tr = tf ≤ 2.0ns, 10% to 90%
FIGURE 5. 3-STATE Output High Enable and
Disable Times for Low Voltage Logic
tr = tf ≤ 2.0ns, 10% to 90%
FIGURE 6. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
tr = tf ≤ 2.0ns, 10% to 90%
www.fairchildsemi.com
6