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AN555 Datasheet PDF : 38 Pages
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AN555
3.1. Si483x-B/Si4820/24 Basic Volume Mode Applications Circuits
Figure 5 and Figure 6 illustrate the basic applications circuits for typical 4-band FM/AM radios if using Si4831-B/
Si4820 or 12-band FM/AM/SW radios if using Si4835-B/Si4824. The chip works in "Volume" mode without internal
volume adjustment. Volume control can be performed at audio amplifier circuit stage. For Si483x-B, the pull-up
resistor R42 of 10K for pin 2 STATION is a must for this application.
C6 and C15 are required bypass capacitors for VDD1/VDD2 power supply pin 20/21. Place C6/C15 as close as
possible to the VDD1/VDD2 pin 20/21 and DBYP pin 22. These recommendations are made to reduce the size of
the current loop created by the bypass cap and routing, minimize bypass cap impedance and return all currents to
the DBYP pin.
Pin 22 is the dedicated bypass capacitor pin. Do not connect it to power supply GND on PCB.
Pin 13 and pin 14 are the GND of the chip, these pins must be well connected to the power supply GND on PCB.
Pin 9 is the RFGND of the chip, it must be well connected to the power supply GND on PCB.
When doing PCB layout, try to create a large GND plane underneath and around the chip. Route all GND
(including RFGND) pins to the GND plane.
C4 and/or C7 (4.7uF) are ac coupling caps for receiver analog audio output from pin 23 and/or pin 24. The input
resistance of the amplifier R, such as a headphone amplifier, and the capacitor C will set the high pass pole given
by Equation 1. Placement location is not critical.
fc
=
-------1--------
2RC
Equation 1.
C2 and C3 (22 pF) are crystal loading caps required only when using the internal oscillator feature. Refer to the
crystal data sheet for the proper load capacitance and be certain to account for parasitic capacitance. Place caps
C2 and C3 such that they share a common GND connection and the current loop area of the crystal and loading
caps is minimized.
Y1 (32.768 kHz) is an optional crystal required only when using the internal oscillator feature. Place the crystal Y1
as close to XTALO pin 18 and XTALI pin 19 as possible to minimize current loops. If applying an external clock
(32.768 kHz) to XTALI, leave XTALO floating.
Do not route digital signals or reference clock traces near pin 6 and 7. Do not route Pin 6 and 7. These pins must
be left floating to guarantee proper operation.
Pin 16, 17 are volume control or bass/treble control pins for using tuner internal volume control function or bass/
treble control function. In this basic application circuit, the tuner internal volume control function is not used, just
connect the two pins to GND.
VR1 (100K / 10%), R27, C1, C13 constitute the tuning circuit. 10 k at 10% tolerance is recommended for VR1.
1P12T switch S2 together with resistor ladder constitute band select circuits. Si4831/Si4820 includes all AM and
FM bands as defined in above section 2.1, Si4835/Si4824 includes all AM, FM and SW bands.
Q1(2SC9018) together with it’s peripherals B6, C30,31,33,36, R31,32,34,41 is the LNA circuit for all SW bands, the
LNA is switched off by LNA_EN signal in AM and FM mode controlled by Si4835/Si4824.
For Si4820/24, do not route pin 23. This pin must be left floating to guarantee proper operation.
10
Rev. 0.2
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