5L35021 Datasheet
ORT–VCO Over-shoot Reduction Technology
The 5L35021 supports the VCO over-shoot reduction technology (ORT) to prevent an output clock frequency spike when the device is
changing frequency on the fly or doing DFC (Dynamic Frequency Control) function. The VCO frequency changes are under control
instead of free-run to targeted frequency.
PLL Features and Descriptions
Table 26. Output 1 Divider
Output Divider bits <3:2>
Output Divider bits <1:0>
00
01
10
11
00
1
2
4
8
01
4
8
16
32
10
5
10
20
40
11
6
12
24
48
Table 27. Output 2, 4, and 5 Divider
Output Divider bits <3:2>
Output Divider bits <1:0>
00
01
10
11
00
1
2
4
5
01
3
6
12
15
10
5
10
20
25
11
10
20
40
50
Table 28. Output 3 Divider
Output Divider bits <1:0>
00
00
1
01
3
10
5
11
10
Output Divider bits <3:2>
01
10
11
2
4
8
6
12
24
10
20
40
20
40
80
©2017 Integrated Device Technology, Inc.
19
July 13, 2017