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5L35021 Ver la hoja de datos (PDF) - Integrated Device Technology

Número de pieza
componentes Descripción
Fabricante
5L35021
IDT
Integrated Device Technology IDT
5L35021 Datasheet PDF : 37 Pages
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Figure 6. Digital Spread Spectrum
N  Fvco
2 * Fout
period  Fpfd
2 * Fss
step  N * SSamount
period
5L35021 Datasheet
Down spread or Spread off
N = Fvco/Fpfd
Center Spread
N = Nssoff + N × SSamount/2
N: include integer and fraction
Fvco: VCOs frequency
Fpfd: PLLs pfd frequency
Fss: spread modulation rate
SSamount: spread percentage
The black line is for the down spread; N will decrease to make the center frequency is lower than spread off.
The blue line is for the center spread; there is an offset put on divider ratio to make the center frequency keep same as spread off.
Example: 0.5% down spread at 32kHz modulation rate.
Suspend Mode with RTC Clock Only
VersaClock 3S can operate on the following two modes:
â–ª Full-power mode:
— Full chip active with the most functionality and all VDDs are connected to power supply.
â–ª Low-power Suspend Mode:
— Device power-up with below sequence:
1. VBAT and all other VDDs are powered up. VBAT ramp must be earlier or same time as other VDDs.
2. After full power up is completed, the device can go into Suspend Mode triggered by VBAT is powered and rest of the VDDs ramped down
(ramp down time slower than 3ms).
In Suspend Mode, device will operate with a 2μA core power with only VBAT powered up. Producing 32kHz outputs on SEx outputs (it can
be multiple copies). Operating at this state helps system in power-down, or sleep mode without losing date-time information at a very low
power budget. When system waking up, device will go back to full power mode automatically and produce outputs upon user
configuration.
When there is core power present (VDD18 and VDDA), the device will switch DCO supply to core power to save battery.
©2017 Integrated Device Technology, Inc.
18
July 13, 2017

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