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MC33363BDW Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza
componentes Descripción
Fabricante
MC33363BDW
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC33363BDW Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
MC33363B
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
Power Switch (Pin 16)
Drain Voltage
Drain Current
VDS
700
V
IDS
1.0
A
Startup Input Voltage (Pin 1, Note 2)
Vin
500
V
Power Supply Voltage (Pin 3)
VCC
40
V
Input Voltage Range
Voltage Feedback Input (Pin 10)
Compensation (Pin 9)
Overvoltage Protection Input (Pin 11)
RT (Pin 6)
CT (Pin 7)
VIR
−1.0 to Vreg
V
Thermal Characteristics
P Suffix, Dual−In−Line Case 648E
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
DW Suffix, Surface Mount Case 751G
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
RqJA
RqJC
RqJA
RqJC
°C/W
80
15
95
15
Operating Junction Temperature
TJ
−25 to +150
°C
Storage Temperature
Tstg
−55 to +150
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015.
Machine Model Method 200 V.
2. Maximum power dissipation limits must be observed.
3. Tested junction temperature range for the MC33363B: Tlow = −25°C Thigh = +125°C
ELECTRICAL CHARACTERISTICS (VCC = 20 V, RT = 10 k, CT = 390 pF, CPin 8 = 1.0 mF, for typical values TJ = 25°C,
for min/max values TJ is the operating junction temperature range that applies (Note 3), unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
REGULATOR (Pin 8)
Output Voltage (IO = 0 mA, TJ = 25°C)
Line Regulation (VCC = 20 V to 40 V)
Load Regulation (IO = 0 mA to 10 mA)
Total Output Variation over Line, Load, and Temperature
OSCILLATOR (Pin 7)
Frequency
CT = 390 pF
TJ = 25°C (VCC = 20 V)
TJ = Tlow to Thigh (VCC = 20 V to 40 V)
CT = 2.0 nF
TJ = 25°C (VCC = 20 V)
TJ = Tlow to Thigh (VCC = 20 V to 40 V)
Frequency Change with Voltage (VCC = 20 V to 40 V)
ERROR AMPLIFIER (Pins 9, 10)
Voltage Feedback Input Threshold
Line Regulation (VCC = 20 V to 40 V, TJ = 25°C)
Input Bias Current (VFB = 2.6 V, TJ = 0 − 125°C)
Open Loop Voltage Gain (TJ = 25°C)
Gain Bandwidth Product (f = 100 kHz, TJ = 25°C)
Output Voltage Swing
High State (ISource = 100 mA, VFB < 2.0 V)
Low State (ISink = 100 mA, VFB > 3.0 V)
Vreg
Regline
Regload
Vreg
fOSC
DfOSC/DV
VFB
Regline
IIB
AVOL
GBW
VOH
VOL
5.5
5.3
260
255
60
59
2.52
70
0.85
4.0
6.5
7.5
V
30
500
mV
44
200
mV
8.0
V
kHz
285
310
315
67.5
75
76
0.1
2.0
kHz
2.6
2.68
V
0.6
5.0
mV
20
500
nA
82
94
dB
1.0
1.15
MHz
V
5.3
0.2
0.35
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