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ML60852A Ver la hoja de datos (PDF) - Oki Electric Industry

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ML60852A
OKI
Oki Electric Industry OKI
ML60852A Datasheet PDF : 81 Pages
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1Semiconductor
FEDL60852A-03
ML60852A
(6) Data packet transmission and reception procedure during isochronous transfer mode
Transfer of data is the major function in the isochronous transfermode. When carrying out isochronous transfer
between the ML60852A and the host, the following packet communications are carried out via the USB bus for the
data transfer of each packet.
(a) Token packet transfer (IN token or OUT token) from the host to the ML60852A.
(b) Data packet transfer in the desired direction (from the host to the device or from the device to the host).
In the isochronous transfer mode, there is no handshaking that reports whether or not the packet transfer was
done normally.
The ML60852A requests the local MCU to send or receive packet data by asserting the INTR pin. The
interrupt cause is SOF. Upon receiving this interrupt, the local MCU writes the packet data into the transmit
FIFO of the EP set for transmission (ISO IN) in the isochronous transfer mode, or reads out data from the
receive FIFO of the EP set for reception (ISO OUT) in the isochronous transfer mode.
The above procedures of transferring one packet of data are explained below for transmission and reception
separately.
1) During transmission
The EP for ISO IN has a two-layer FIFO configuration. One FIFO is used for storing the packet data that is
written in by the MCU via the local bus. The other FIFO is used for transmitting the stored data to the USB bus
when an IN token is received. The roles of the two FIFOs are interchanged when an SOF packet is received.
Upon receiving an SOF interrupt, the local MCU writes the data to be transmitted during the next frame into the
corresponding transmit FIFO of the EP of the ML60852A. When the host transmits an IN token packet, the
ML60852A transmits to the host the packet data written in the transmit FIFO during the previous frame.
2) During reception
The EP for ISO OUT has a two-layer FIFO configuration. One FIFO is used for storing the packet data that is
output to the local bus when the MCU reads the received packet data. The other FIFO is used for storing the
packet data received from the USB bus. The roles of the two FIFOs are interchanged when an SOF packet is
received.
Upon receiving an SOF interrupt, the local MCU reads out the data that has been received during the previous
frame from the corresponding receive FIFO of the EP of the ML60852A. When the host transmits an OUT
token and a data packet to the ML60852A, the ML60852A stores that received data packet in the receive FIFO,
and that data packet is read out by the local MCU during the next frame.
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