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SI8610

LOW-POWER SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS

Silicon Laboratories 

Si8610/20/21/22

Table 3. Electrical Characteristics (Continued)

(VDD1 = 3.3 V ±10%, VDD2 = 3.3 V ±10%, TA = –40 to 125 ºC)

Parameter

Symbol Test Condition

Min

Typ

Max Unit

Timing Characteristics

Si861x/2x Bx, Ex

Maximum Data Rate

0

—

150 Mbps

Minimum Pulse Width

—

—

5.0

ns

Propagation Delay

tPHL, tPLH See Figure 1

5.0

Pulse Width Distortion

PWD

See Figure 1

—

|tPLH - tPHL|

Propagation Delay Skew2

tPSK(P-P)

—

Channel-Channel Skew

tPSK

—

All Models

8.0

13

ns

0.2

4.5

ns

2.0

4.5

ns

0.4

2.5

ns

Output Rise Time

tr

CL = 15 pF

See Figure 1

—

2.5

4.0

ns

Output Fall Time

tf

CL = 15 pF

See Figure 1

—

2.5

4.0

ns

Peak Eye Diagram Jitter

tJIT(PK)

See Figure 6

—

350

—

ps

Common Mode Transient

Immunity

CMTI

VI = VDD or 0 V

35

50

— kV/µs

Start-up Time3

tSU

—

15

40

µs

Notes:

1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a

combination of the value of the on-chip series termination resistor and channel resistance of the output driver

FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately

terminated with controlled impedance PCB traces.

2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units

operating at the same supply voltages, load, and ambient temperature.

3. Start-up time is the time period from the application of power to valid data at the output.

10

Rev. 1.3

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