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M38031F3L-XXXSP Ver la hoja de datos (PDF) - Renesas Electronics

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M38031F3L-XXXSP
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M38031F3L-XXXSP Datasheet PDF : 119 Pages
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3803 Group (Spec.L)
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit, the
internal system clock control bits, etc.
The CPU mode register is allocated at address 003B16.
b7
1
Fig 9. Structure of CPU mode register
b0 CPU mode register
(CPUM: address 003B16)
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1:
1 0 : Not available
1 1:
Stack page selection bit
0 : 0 page
1 : 1 page
Fix this bit to “1”.
Port XC switch bit
0 : I/O port function (stop oscillating)
1 : XCIN-XCOUT oscillating function
Main clock (XIN-XOUT) stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bits
b7 b6
0 0 : φ = f(XIN)/2 (high-speed mode)
0 1 : φ = f(XIN)/8 (middle-speed mode)
1 0 : φ = f(XCIN)/2 (low-speed mode)
1 1 : Not available
Rev.1.00 Apr 2, 2007 Page 12 of 117
REJ03B0212-0100

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