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PEMD3 Datasheet PDF : 11 Pages
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NXP Semiconductors
PEMD3; PIMD3; PUMD3
NPN/PNP resistor-equipped transistors; R1 = 10 kΩ, R2 = 10 kΩ
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
VCEO
collector-emitter voltage open base
-
VEBO
emitter-base voltage
open collector
-
VI
input voltage TR1
positive
-
negative
-
input voltage TR2
positive
-
negative
-
IO
output current (DC)
-
ICM
peak collector current
-
Ptot
total power dissipation
Tamb ≤ 25 °C
SOT363
[1] -
SOT457
[2] -
SOT666
[1][3] -
Tstg
storage temperature
−65
Tj
junction temperature
-
Tamb
ambient temperature
−65
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
SOT363
[1] -
SOT457
[2] -
SOT666
[1][3] -
Max Unit
50
V
50
V
10
V
+40
V
−10
V
+10
V
−40
V
100
mA
100
mA
200
mW
300
mW
200
mW
+150 °C
150
°C
+150 °C
300
mW
600
mW
300
mW
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Device mounted on an FR4 PCB with 65 μm copper strip line, standard footprint.
[3] Reflow soldering is the only recommended soldering method.
PEMD3_PIMD3_PUMD3_10
Product data sheet
Rev. 10 — 15 November 2009
© NXP B.V. 2009. All rights reserved.
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