SAA5290 Ver la hoja de datos (PDF) - Philips Electronics

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SAA5290

One page Economy Teletext/TV microcontroller

Philips Electronics 

Philips Semiconductors

One page Economy Teletext/TV

microcontroller

The 7 least significant bits, TD6 to TD0, extend the HIGH

time of a proportion of the pulses by 0.33 µs. If the LSB is

set then 1 in 128 cycles is extended, if bit 1 is set then

1 in 64 cycles is extended, and so on.

SOFTWARE ADC

Up to 3 successive approximation ADCs can be

implemented in software by making use of the on-board

4-bit DAC and multiplexed voltage comparator. The

software ADC uses 3 analog inputs which are multiplexed

with P3.0 to P3.2.

The control of the ADC is achieved using the SAD SFR.

SAD.5 and SAD.6 select one of the three inputs to pass to

the comparator. The other input comes from the DAC

whose input is set by SAD bits 0 to 3. The output of the

comparator is SAD bit 7 and is valid by the next instruction

after starting the comparison by setting SAD.ST to logic 1.

Microcontroller interfacing

The 80C51 CPU communicates with the peripheral

functions using Special Function Registers (SFRs) which

are addressed as RAM locations. The registers in the

teletext decoder appear as normal SFRs in the

microcontroller memory map, but are written to using a

serial bus. This bus is controlled by dedicated hardware

which uses a simple handshake system for software

synchronization. The SFR memory map is given in

Table 10.

Preliminary specification

SAA5290

February 1995

15

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