Figure 5-1. Single Supply
Main Supply
(1.8V-3.6V)
VDDIO
VDDIN
VDDOUT
VDDCORE
VDDPLL
I/Os.
ADC, DAC
Voltage
Regulator
Figure 5-2. Core Externally Supplied
Main Supply
(1.62V-3.6V)
Can be the
same supply
ADC, DAC Supply
(3V-3.6V)
VDDCORE Supply
(1.62V-1.95V)
VDDIO
VDDIN
VDDOUT
VDDCORE
VDDPLL
I/Os.
ADC, DAC
Voltage
Regulator
Note:
Restrictions
With Main Supply < 3V, ADC and DAC are not usable.
With Main Supply >= 3V, all peripherals are usable.
Figure 5-3 below provides an example of the powering scheme when using a backup battery.
Since the PIO state is preserved when in backup mode, any free PIO line can be used to switch
off the external regulator by driving the PIO line at low level (PIO is input, pull-up enabled after
backup reset). External wake-up of the system can be from a push button or any signal. See
Section 5.6 “Wake-up Sources” for further details.TFBGA
18 SAM3N Summary
11011BS–ATARM–22-Feb-12