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Intel® Atom™ Processor D2000 and N2000 Series

Intel 

1 Introduction

Note:

1.1

This Datasheet (DS) provides Direct Current (DC) and Alternate Current (AC) electrical

specifications, signal integrity, differential signaling specifications, pinout and signal

definitions, interface functional descriptions, and additional feature information

pertinent to the implementation and operation of the processor on its respective

platform.

Throughout this document, the Intel® Atom™ Processor D2000 series and N2000

Series processor is referred to as processor and Intel® NM10 Express Chipset is

referred to as chipset.

The processor is built on 32-nanometer Hi-K process technology. The processor is

designed for a two-chip platform as opposed to the traditional three-chip platforms

(processor, GMCH, and ICH). The two-chip platform consists of a processor and the

chipset and enables higher performance, lower cost, easier validation, and

improved x-y footprint.

Included in this family of processors is an integrated memory controller (IMC),

integrated graphics processing unit (GPU) and integrated I/O on a single silicon die.

This single die solution is known as a monolithic processor.

Intel® Atom™ Processor D2000 Series and N2000

Series Features

The following list provides some of the key features on this processor:

• On die, primary 32kB, 4-way L1 instructions cache and 24kB, 6-way L1 write-back

data cache

• Intel® Hyper-Threading Technology 2-threads per core except for D2500 - no HT

support

• 512-kB, 8-way ECC protected L2 cache per core processor

• Support for IA 32-bit

• Intel® Streaming SIMD Extensions 2 and 3 (SSE2 and SSE3) and Supplemental

Streaming SIMD Extensions 3 (SSSE3) support

• Intel® 64 architecture

• Micro-FCBGA11 packaging technologies

• Thermal management support via Intel® Thermal Monitor (TM1 & TM2) - ELD TM1

only

• Supports C0 and C1 states only for D2000 series; C0-C4, C1E-C4E and Deep Power

Down Technology (code named C6) state for N2000 series processor

• Execute Disable Bit support for enhanced security

Datasheet - Volume 1 of 2

9

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