KSZ9021GN Ver la hoja de datos (PDF) - Micrel

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Fabricante

KSZ9021GN

Gigabit Ethernet Transceiver with GMII / MII Support

Micrel 

Micrel, Inc.

Register Number (Hex)

27 (1Bh)

28 (1Ch)

29 (1Dh) – 30 (1Eh)

31 (1Fh)

Extended Registers

257 (101h)

258 (102h)

259 (103h)

263 (107h)

Description

Interrupt Control/Status

Digital Debug Control 1

Reserved

PHY Control

Strap Status

Operation Mode Strap Override

Operation Mode Strap Status

Analog Test Register

KSZ9021GN

Register Description

IEEE Defined Registers

Address

Name

Description

Register 0 (0h) – Basic Control

0.15

Reset

1 = Software PHY reset

0 = Normal operation

This bit is self-cleared after a ‘1’ is written to it.

0.14

Loop-back

1 = Loop-back mode

0 = Normal operation

0.13

Speed Select

(LSB)

[0.6, 0.13]

[1,1] = Reserved

[1,0] = 1000Mbps

[0,1] = 100Mbps

[0,0] = 10Mbps

This bit is ignored if auto-negotiation is enabled

(register 0.12 = 1).

0.12

Auto-

1 = Enable auto-negotiation process

Negotiation

Enable

0 = Disable auto-negotiation process

If enabled, auto-negotiation result overrides

settings in register 0.13, 0.8 and 0.6.

0.11

Power Down 1 = Power down mode

0 = Normal operation

Mode(1)

RW/SC

RW

RW

RW

RW

0.10

Isolate

1 = Electrical isolation of PHY from GMII/MII

RW

0 = Normal operation

0.9

Restart Auto- 1 = Restart auto-negotiation process

Negotiation

0 = Normal operation.

RW/SC

This bit is self-cleared after a ‘1’ is written to it.

0.8

Duplex Mode 1 = Full-duplex

RW

0 = Half-duplex

0.7

Collision Test 1 = Enable COL test

RW

0 = Disable COL test

Default

0

0

Hardware Setting

1

0

0

0

Hardware Setting

0

September 2010

30

M9999-091010-1.1

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