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CY7C1373D-133BZXI Ver la hoja de datos (PDF) - Cypress Semiconductor

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CY7C1373D-133BZXI Datasheet PDF : 30 Pages
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PRELIMINARY
CY7C1371D
CY7C1373D
Maximum Ratings
Current into Outputs (LOW)......................................... 20 mA
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on VDD Relative to GND........ –0.5V to +4.6V
DC Voltage Applied to Outputs
in Tri-State........................................... –0.5V to VDDQ + 0.5V
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Ambient
Range Temperature
VDD
VDDQ
Commercial 0°C to +70°C 3.3V – 5%/+10% 2.5V – 5%
Industrial –40°C to +85°C
to VDD
DC Input Voltage....................................–0.5V to VDD + 0.5V
Electrical Characteristics Over the Operating Range[16, 17]
Parameter
Description
Test Conditions
Min.
VDD
VDDQ
VOH
VOL
VIH
VIL
IX
IDD
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage[16]
Input LOW Voltage[16]
Input Load
Input Current of MODE
Input Current of ZZ
VDD Operating Supply
Current
VDDQ = 3.3V
VDDQ = 2.5V
VDDQ = 3.3V, VDD = Min., IOH = –4.0 mA
VDDQ = 2.5V, VDD = Min., IOH = –1.0 mA
VDDQ = 3.3V, VDD = Min., IOL = 8.0 mA
VDDQ = 2.5V, VDD = Min., IOL = 1.0 mA
VDDQ = 3.3V
VDDQ = 2.5V
VDDQ = 3.3V
VDDQ = 2.5V
GND VI VDDQ
Input = VSS
Input = VDD
Input = VSS
Input = VDD
VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
3.135
3.135
2.375
2.4
2.0
2.0
1.7
–0.3
–0.3
–5
–5
–30
ISB1
Automatic CE
VDD = Max, Device Deselected, 7.5-ns cycle, 133 MHz
Power-down
Current—TTL Inputs
VIN VIH or VIN VIL
f = fMAX, inputs switching
10-ns cycle, 100 MHz
ISB2
Automatic CE
VDD = Max, Device Deselected, All speeds
Power-down
VIN 0.3V or VIN > VDD – 0.3V,
Current—CMOS Inputs f = 0, inputs static
ISB3
Automatic CE
VDD = Max, Device Deselected, or 7.5-ns cycle, 133 MHz
Power-down
VIN 0.3V or VIN > VDDQ – 0.3V 10-ns cycle, 100 MHz
Current—CMOS Inputs f = fMAX, inputs switching
ISB4
Automatic CE
VDD = Max, Device Deselected, All Speeds
Power-down
VIN VDD – 0.3V or VIN 0.3V, f =
Current—TTL Inputs 0, inputs static
Notes:
16. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (Pulse width less than tCYC/2).
17. TPower-up: Assumes a linear ramp from 0V to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD
Max.
3.6
VDD
2.625
0.4
0.4
VDD + 0.3V
VDD + 0.3V
0.8
0.7
5
30
5
210
175
140
120
70
130
110
80
Unit
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
Document #: 38-05556 Rev. *A
Page 20 of 30

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