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PCA9685BS

16-channel, 12-bit PWM Fm+ I2C-bus LED controller

NXP Semiconductors. 

NXP Semiconductors

PCA9685

16-channel, 12-bit PWM Fm+ I2C-bus LED controller

7.3.1.1 Restart mode

If the PCA9685 is operating and the user decides to put the chip to sleep (setting MODE1

bit 4) without stopping any of the PWM channels, the RESTART bit (MODE1 bit 7) will be

set to logic 1 at the end of the PWM refresh cycle. The contents of each PWM register are

held valid when the clock is off.

To restart all of the previously active PWM channels with a few I2C-bus cycles do the

following steps:

1. Read MODE1 register.

2. Check that bit 7 (RESTART) is a logic 1. If it is, clear bit 4 (SLEEP). Allow time for

oscillator to stabilize (500 μs).

3. Write logic 1 to bit 7 of MODE1 register. All PWM channels will restart and the

RESTART bit will clear.

Remark: The SLEEP bit must be logic 0 for at least 500 μs, before a logic 1 is written into

the RESTART bit.

Other actions that will clear the RESTART bit are:

1. Power cycle.

2. I2C Software Reset command.

3. If the MODE2 OCH bit is logic 0, write to any PWM register then issue an I2C-bus

STOP.

4. If the MODE2 OCH bit is logic 1, write to all four PWM registers in any PWM channel.

Likewise, if the user does an orderly shutdown1 of all the PWM channels before setting

the SLEEP bit, the RESTART bit will be cleared. If this is done the contents of all PWM

registers are invalidated and must be reloaded before reuse.

An example of the use of the RESTART bit would be the restoring of a customer’s laptop

LCD backlight intensity coming out of Standby to the level it was before going into

Standby.

1. Two methods can be used to do an orderly shutdown. The fastest is to write a logic 1 to bit 4 in register ALL_LED_OFF_H. The

other method is to write logic 1 to bit 4 in each active PWM channel LEDn_OFF_H register.

PCA9685

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 2 September 2010

© NXP B.V. 2010. All rights reserved.

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