PEX8748 Ver la hoja de datos (PDF) - Avago Technologies
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PEX8748 Datasheet PDF : 6 Pages
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PEX 8748, PCI Express Gen 3 Switch, 48 Lanes, 12 Ports
Error Injection & SerDes Loopback
Using the PEX 8748’s Error Injection feature, users can
inject malformed packets and/or fatal errors into their
system and evaluate a system’s ability to detect and
recover from such errors. The PEX 8748 also supports
Internal Tx, External Tx, Recovered Clock, and Recovered
Data Loopback modes.
Applications
Suitable for host-centric as well as peer-to-peer traffic
patterns, the PEX 8748 can be configured for a wide
variety of form factors and applications.
Host Centric Fan-out
The PEX 8748, with its symmetric or asymmetric lane
configuration capability, allows user-specific tuning to a
variety of host-centric applications. Figure 6 shows a
server design where, in a quad or multi processor system,
users can assign endpoints/slots to CPU cores to distribute
the system load. The packets directed to different CPU
cores will go to different (user assigned) PEX 8748
upstream ports, allowing better queuing and load balancing
capability for
higher
performance.
Conversely, the
PEX 8748 can
also be used in
PCH
PCI
SATA
x1s
CPU CPU
CPU CPU
x8 x8
Memory
PEX 8748
single-host mode Endpoint x8s
x4s
to simply fan-out
to endpoints.
PCIe Gen1, Gen2, or Gen3 slots
Figure 6. Host Centric Dual Upstream
Multi-Host Systems
In multi-host mode, the PEX 8748 can be shared by up to
six hosts in a
system. By
creating six
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
virtual switches,
Mem
Mem
Mem
Mem
the PEX 8748
PCH
PCH
PCH
PCH
allows six hosts
I/Os
I/Os
I/Os
I/Os
to fan-out to
their respective
PEX 8748
endpoints. This
reduces the
number of
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Figure 7. Multi-Host System
switches required for fan-out, saving precious board space
and power consumption. In Figure 7, the PEX 8748 is
being shared by four different servers (hosts) with each
server is running its own applications (I/Os). The PEX
8748 assigns the endpoints to the appropriate host and
isolates them from the other hosts.
Host Failover
The PEX 8748 can also be utilized in applications where
host failover is required. In the below application (Figure
8), two hosts may be active simultaneously and controlling
their own domains while exchange status information
through doorbell registers or I2C interface. The devices can
be programmed to trigger fail-over if the heartbeat
information is not provided. CPU CPU
CPU CPU
In the event of a failure, the CPU CPU
CPU CPU
surviving device will reset x8
x8
the endpoints connected to
the failing CPU and
x8s
PEX 8748
PEX 8748
enumerate them in its own
x8s x8s
domain without impacting
the operation of endpoints
already in its domain.
Figure 8. Host Fail-Over
N+1 Fail-Over in Storage Systems
The PEX 8748’s Multi-Host feature can also be used to
develop storage array clusters where each host manages a
set of storage devices independent of others (Figure 9).
Users can designate one of the hosts as the failover-host
for all the other hosts while actively managing its own
endpoints. The failover-host will communicate with other
hosts for status/heartbeat information and execute a
failover event if/when it gets triggered.
CPU
CPU
CPU
CPU
x4 x4
CPU
CPU
CPU
CPU
x8 x8
PEX 8748
x4 x4
x8 x8
PEX 871P6EX 8716
PEX
PEX
8712x4
87x142
x4
xx44
x4
x4
x4
FC
FFCC
FC
FC FC
FC FC
8 Disk C8hDaissskisChassis
8 Disk Chassis
8 Disk Chassis
Figure 9. N+1 Failover
© PLX Technology, www.plxtech.com
Page 4 of 5
10/7/2010, Version 1.0
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