PCA9535PW Ver la hoja de datos (PDF) - NXP Semiconductors.

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PCA9535PW

16-bit I2C-bus and SMBus, low power I/O port with interrupt

NXP Semiconductors. 

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data into port 0

data into port 1

INT

tv(INT_N)

trst(INT_N)

SCL 1 2 3 4 5 6 7 8 9

R/W

slave address

I0.x

I1.x

I0.x

I1.x

STOP condition

SDA S 0 1 0 0 A2 A1 A0 1 A 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 1 P

START condition

read from port 0

acknowledge

from slave

acknowledge

from master

acknowledge

from master

acknowledge

from master

non acknowledge

from master

read from port 1

002aac223

Remark: Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid (output mode). It

is assumed that the command byte has previously been set to ‘00’ (read Input Port register).

Fig 11. Read Input Port register, scenario 1

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