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M24512-DF Ver la hoja de datos (PDF) - STMicroelectronics

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componentes Descripción
Fabricante
M24512-DF
STMICROELECTRONICS
STMicroelectronics STMICROELECTRONICS
M24512-DF Datasheet PDF : 40 Pages
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Instructions
M24512-W M24512-R M24512-DR M24512-DF
5.1.2
Page Write
The Page Write mode allows up to 128 bytes to be written in a single Write cycle, provided
that they are all located in the same page in the memory: that is, the most significant
memory address bits, A15/A7, are the same. If more bytes are sent than will fit up to the end
of the page, a “roll-over†occurs, i.e. the bytes exceeding the page end are written on the
same page, from location 0.
The bus master sends from 1 to 128 bytes of data, each of which is acknowledged by the
device if Write Control (WC) is low. If Write Control (WC) is high, the contents of the
addressed memory location are not modified, and each data byte is followed by a NoAck, as
shown in Figure 8. After each transferred byte, the internal page address counter is
incremented.
The transfer is terminated by the bus master generating a Stop condition.
Figure 8. Write mode sequences with WC = 1 (data write inhibited)
WC
Byte Write
ACK
ACK
ACK
NO ACK
Dev sel
Byte addr
Byte addr
Data in
R/W
WC
Page Write
ACK
ACK
ACK
NO ACK
Dev sel
Byte addr
Byte addr
Data in 1
Data in 2
R/W
WC (cont'd)
Page Write (cont'd)
NO ACK
NO ACK
Data in N
AI01120d
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Doc ID 16459 Rev 26

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