MAX3088ECSA Ver la hoja de datos (PDF) - Maxim Integrated

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MAX3088ECSA

±15kV ESD-Protected, Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422 Transceivers

Maxim Integrated 

±15kV ESD-Protected, Fail-Safe, High-Speed (10Mbps),

Slew-Rate-Limited RS-485/RS-422 Transceivers

VCC RE

MAX3089E

A

RD

TOP VIEW

B

H/F 1

14 VCC RXP

RO 2

13 RXP

RE 3 MAX3089E 12 A

DE 4

11 B

H/F

DI 5

10 Z

Z

SRL 6

TXP

9Y

GND 7

8 TXP

DIP/SO

Y

DI

NOTE: SWITCH POSITIONS

INDICATED FOR H/F = GND

GND DE SRL

Figure 4. MAX3089E Pin Configuration and Functional Diagram

Y

VOD

Z

R

R

VOC

RECEIVER TEST POINT

OUTPUT

CRL

15pF

1k

1k

VCC

S1

S2

Figure 5. Driver DC Test Load

The ESD-protected pins are tested with reference to the

ground pin in a powered-down condition. They are test-

ed to ±15kV using the Human Body Model.

ESD Test Conditions

ESD performance depends on a variety of conditions.

Contact Maxim for a reliability report that documents

test setup, test methodology, and test results.

Human Body Model

Figure 14a shows the Human Body Model, and Figure

14b shows the current waveform it generates when dis-

Figure 6. Receiver Enable/Disable Timing Test Load

charged into a low impedance. This model consists of

a 100pF capacitor charged to the ESD voltage of inter-

est, which is then discharged into the test device

through a 1.5kΩ resistor.

Machine Model

The Machine Model for ESD tests all pins using a

200pF storage capacitor and zero discharge resis-

tance. The objective is to emulate the stress caused

when I/O pins are contacted by handling equipment

during test and assembly. All pins require this protec-

______________________________________________________________________________________ 15

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